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GD25D10B 参数 Datasheet PDF下载

GD25D10B图片预览
型号: GD25D10B
PDF下载: 下载PDF文件 查看货源
内容描述: [1M-bit Serial Flash]
分类和应用:
文件页数/大小: 28 页 / 2328 K
品牌: ELM [ ELM ELECTRONICS ]
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GD25D10BxIGx Uniform sector dual and quad serial flash  
http://www.elm-tech.com  
Software Protection Mode: The Block Protect (BP2, BP1, BP0) bits define the section of the protected  
memory area which is read-only and unalterable.  
Hardware Protection Mode: WP# going low to protected the BP0~BP2 bits and SRP bits.  
Deep Power-Down Mode: In Deep Power-Down Mode, all commands are ignored except the Release from  
Deep Power-Down Mode command.  
Write Inhibit Voltage (VWI): Device would reset automatically when VCC is below a certain threshold VWI.  
Table 1. GD25D10B Protected area size  
Status Register Content  
Memory Content  
Addresses  
BP2  
0
BP1  
0
BP0  
0
Blocks  
NONE  
Density  
NONE  
120KB  
112KB  
96KB  
64KB  
128KB  
128KB  
Portion  
NONE  
Lower 30/32  
Lower 28/32  
Lower 24/32  
Lower 16/32  
All  
NONE  
0
0
0
1
1
1
0
1
1
0
0
1
1
0
1
0
1
×
Sector 0 to 29  
Sector 0 to 27  
Sector 0 to 23  
Sector 0 to 15  
All  
000000H-01DFFFH  
000000H-01BFFFH  
000000H-017FFFH  
000000H-00FFFFH  
000000H-01FFFFH  
000000H-01FFFFH  
All  
All  
6. STATUS REGISTER  
S7  
S6  
S5  
Reserved  
S4  
S3  
S2  
S1  
WEL  
S0  
SRP  
Reserved  
BP2  
BP1  
BP0  
WIP  
The status and control bits of the Status Register are as follows:  
WIP bit.  
The Write In Progress (WIP) bit indicates whether the memory is busy in program/erase/write status register  
progress. When WIP bit is set to 1, it means the device is busy in program/erase/write status register progress.  
When WIP bit is cleared to 0, it means the device is not in program/erase/write status register progress. The  
default value of WIP is 0.  
WEL bit.  
The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch. When set to 1 the  
internal Write Enable Latch is set, when set to 0 the internal Write Enable Latch is reset and no write Status  
Register, Program or Erase command is accepted. The default value of WEL is 0.  
BP2, BP1, BP0 bits.  
The Block Protect (BP2, BP1, BP0) bits are non-volatile. They define the size of the area to be software  
protected against Program and Erase commands. These bits are written with the Write Statue Register (WRSR)  
command. When the Block Protect (BP2, BP1, BP0) bits are set to 1, the relevant memory area (as defined in  
Table1). Becomes protected against Page Program (PP), Sector Erase (SE) and Block Erase (BE) commands.  
Rev.1.0  
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