C6003B
Device Marking Sample
Cypress
Marking Example
C6003BS
C6003BS
Date Code, Lot #
Package
S = SOIC
Revision
Device Number
Package Drawing and Dimensions
8-pin SOIC
C
L
H
E
a
D
A2
A
A1
e
B
8-pin SOIC Outline Dimensions
Inches
Millimeters
Parameter Min. Nom. Max. Min. Nom. Max.
A
A1
A2
B
0.053
0.004
0.047
0.013
0.007
0.189
0.150
–
0.069 1.35
0.010 0.10
0.059 1.20
0.020 0.33
0.010 0.19
0.197 4.80
0.157 3.80
–
1.75
0.25
1.50
0.51
0.25
5.00
4.00
–
–
–
–
–
–
C
D
E
–
–
–
–
–
–
e
0.050 BSC
1.27 BSC
H
L
0.228
0.016
0°
–
–
–
0.244 5.80
0.050 0.40
–
–
–
6.20
1.27
8°
a
8°
0°
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Document #: 38-07342 Rev. **
Page 5 of 6
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
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