CYW20704
■ Full support for power savings modes:
❐ Bluetooth standard sniff
❐ Deep sleep modes and regulator shutdown
■ Built-in LPO clock
■ Larger patch RAM space to support future enhancements
■ Serial flash Interface with native support for devices from several manufacturers
■ One-Time Programmable (OTP) memory
1.3 Block Diagram
Figure 2 shows the interconnect of the major CYW20704 physical blocks and associated external interfaces.
Figure 2. Functional Block Diagram
Document Number: 002-14786 Rev. *E
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