B9949
AC Parameters[6]: VDDC = 3.3V ±5%, VDD = 3.3V ±5%, TA = –40°C to +85°C
Parameter
Fmax
Description
Maximum Input Frequency[7]
PECL_CLK to Q Delay[7]
TCLK to Q Delay[7]
Conditions
Min.
160
4.0
Typ.
Max.
Unit
MHz
ns
Tpd
-
-
8.6
4.2
10.5
FoutDC
Output Duty Cycle[7, 8]
Measured at VDDC/2
TCYCLE/2
TCYCLE/2 +
1
ns
– 1
tpZL, tpZH
tpLZ, tpHZ
Tskew
Output Enable Time (all outputs)
Output Disable Time (all outputs)
Output-to-Output Skew[7, 9]
2
2
10
10
ns
ns
ps
ns
Fin<130MHz
PECL_CLK to Q
TCLK to Q
350
2.75
4.0
1.0
Tskew (pp) Part-to-Part Skew [10]
1.5
2.0
Tr/Tf
Output Clocks Rise/Fall Time[9]
0.8V to 2.0V
0.10
ns
Notes:
6. Parameters are guaranteed by design and characterization. Not 100% tested in production. All parameters specified with loaded outputs.
7. Outputs driving 50Ω transmission lines.
8. 50% input duty cycle.
9. Outputs loaded with 30 pF each
10. Part-to-Part Skew at a given temperature and voltage
Document #: 38-07081 Rev. *C
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