D A T A S H E E T
(Erase/Program) Operation Timings ............................................... 49
Ordering Information ............................................................ 53
Secured Silicon Flash Memory Region ............................... 53
Command Definitions .......................................................... 53
AC Characteristics ............................................................... 53
DC Characteristics ............................................................... 53
TSOP, SO, and BGA Package Capacitance ....................... 53
Distinctive Characteristics ................................................... 53
Secured Silicon Flash Memory Region ............................... 53
Command Definitions .......................................................... 54
Erase and Programming Performance ................................ 54
Distinctive Characteristics ................................................... 54
Secured Silicon Sector ........................................................ 54
Valid Combinations ..............................................................54
Command Definitions .......................................................... 54
Ordering Information ............................................................ 54
Product Selector Guide ....................................................... 54
Global .................................................................................. 54
Ordering Information ............................................................ 54
Erase and Programming Performance ................................ 54
AC Characteristics ............................................................... 54
Erase and Program Operations ........................................... 54
Alternate CE# Control Erase and Program Operations ....... 54
Command Definitions .......................................................... 54
Global .................................................................................. 54
Common Flash Memory Interfacte (CFI) ............................. 54
Global .................................................................................. 54
Erase And Programming Performance . . . . . . . . 50
Latchup Characteristics . . . . . . . . . . . . . . . . . . . 50
TSOP and BGA Package Capacitance . . . . . . . 50
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 51
FBD048—48-ball Fine-Pitch Ball Grid Array (FBGA)
6 x 12 mm package ................................................................... 51
TS 048—48-Pin Standard TSOP ............................................... 52
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 53
Ordering Information ............................................................ 53
Connection Diagrams .......................................................... 53
Global .................................................................................. 53
Table 3, Top Boot Secured Silicon Sector Addresses ......... 53
Sector/Sector Block Protection and Unprotection ............... 53
Secured Silicon Sector Flash Memory Region .................... 53
Global .................................................................................. 53
Ordering Information ............................................................ 53
Table 1, Am29LV320D Device Bus Operations ................... 53
Secured Silicon Sector Flash Memory Region .................... 53
Autoselect Command Sequence ......................................... 53
Table 14, Am29LV320D Command Definitions ................... 53
Erase and Program Operations table .................................. 53
Figure 3, Secured Silicon Sector Protect Verify ................... 53
Distinctive Characteristics ................................................... 53
Connection Diagrams .......................................................... 53
4
Am29LV320D
December 14, 2005
CYPRESS [ CYPRESS ]
