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CPC7594BATR 参数 Datasheet PDF下载

CPC7594BATR图片预览
型号: CPC7594BATR
PDF下载: 下载PDF文件 查看货源
内容描述: 线卡接入交换机 [Line Card Access Switch]
分类和应用: 电信集成电路光电二极管
文件页数/大小: 20 页 / 597 K
品牌: CLARE [ CLARE, INC. ]
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CPC7594
Line Card Access Switch
Features
TTL logic level inputs for 3.3V logic interfaces
Smart logic for power up / hot plug state control
Small 16-pin SOIC or 16-pin DFN Package
DFN package printed-circuit board footprint is 60
percent smaller than the SOIC version, 70 percent
smaller than 4
th
generation EMR solutions.
Monolithic IC reliability
Low matched R
ON
Eliminates the need for zero cross switching
Flexible switch timing to transition from ringing mode
to talk mode.
Clean, bounce-free switching
Tertiary protection consisting of integrated current
limiting, voltage clamping, and thermal shutdown for
SLIC protection
5 V operation with power consumption < 10 mW
Intelligent battery monitor
Latched logic-level inputs, no external drive circuitry
required
Description
The CPC7594 is a member of Clare’s next generation
Line Card Access Switch family. This monolithic 6-pole
solid-state switch is available in either a 16-pin SOIC
or a 16-pin DFN package. It provides the necessary
functions to replace two 2-Form-C electro-mechanical
relays used on traditional analog and contemporary
integrated voice and data (IVD) line cards found in
Central Office, Access, and PBX equipment. Because
this device contains solid state switches for tip and ring
line break, ringing injection/return and channel test
access, it requires only a +5V supply for operation and
TTL logic-level inputs for control.
The CPC7594 is particularly designed for IVD line
cards where an EMR is required for line test due to the
high frequencies typical of ADSL but solid-state
switches are desired for switching and test-in
functions.
The CPC7594xC logic differs from the CPC7594xA/B
logic by providing a monitor function during the test
state.
Applications
VoIP Gateways
Central office (CO)
Digital Loop Carrier (DLC)
PBX Systems
Digitally Added Main Line (DAML)
Hybrid Fiber Coax (HFC)
Fiber in the Loop (FITL)
Pair Gain System
Channel Banks
Ordering Information
CPC7594 part numbers are specified as shown here:
B - 16-pin SOIC delivered 50/Tube, 1000/Reel
M - 16-pin DFN delivered 52/Tube, 1000/Reel
CPC7594 x x xx
TR - Add for Tape & Reel
Version
A -
With
Protection SCR
B -
Without
Protection SCR
C -
With
Protection SCR and “Monitor Test State”
Figure 1. CPC7594 Block Diagram
T
TEST
(T
CHANTEST
)
5 T
RINGING
1
+5V
DC
6 V
DD
X
SW3
Tip
Secondary
Protection
X
SW5
X
CPC7594
3 T
BAT
T
LINE
4
SW1
SLIC
R
LINE
13
SW2
Ring
X
14 R
BAT
X
SW4
X
SW6
V
REF
Switch
Control
Logic
L
A
T
C
H
7
9
10
11
IN
TEST
IN
RINGING
LATCH
V
BAT
12 R
RINGING
RINGING
6
300
Ω
(min.)
2
F
GND
SCR Trip Circuit
(CPC7594xA/C)
15
V
BAT
8
D
GND
T
SD
R
TEST
(R
CHANTEST
)
Pb
DS-CPC7594 - R03
RoHS
2002/95/EC
e
3
1
www.clare.com