CS5302
ELECTRICAL CHARACTERISTICS (continued) (0°C < T < 70°C; 0°C < T < 125°C; 4.7 V < V
< 14 V; 10 V < V
< 20 V;
CCH
A
J
CCL
C
= 3.3 nF, C
= 3.3 nF, R
= 32.4 k, C
= 1.0 nF, C = 0.1 µF, C
= 0.1 µF, DAC Code 1001, C = 1.0 µF,
VCC
GATE(H)
GATE(L)
R(OSC)
COMP
SS
REF
I
≥ 1.0 V; unless otherwise specified.)
LIM
Characteristic
Test Conditions
Min
Typ
Max
Unit
Current Sensing and Sharing
Bias Current
I
0 < I
< 1.0 V
–
0.1
1.0
µA
LIM
LIM
Single Phase Pulse by Pulse
Current Limit: V(CSx) – V(CS
–
90
105
135
mV
)
REF
Current Share Amplifier Bandwidth
Note 1.
1.0
3.2
–
–
MHz
V
Reference Output
V
REF
Output Voltage
3.3
3.4
0 mA < I(V
) < 1.0 mA
REF
General Electrical Specifications
V
V
V
V
V
V
V
V
V
V
V
Operating Current
V
V
V
V
V
= COMP (no switching)
= COMP (no switching)
= COMP (no switching)
= COMP (no switching)
= COMP (no switching)
–
–
20
4.0
4.0
2.8
2.5
4.4
4.2
200
9.2
8.7
500
24.5
5.5
5.5
4.0
3.5
4.7
4.6
300
9.9
9.6
700
mA
mA
mA
mA
mA
V
CCL
FB
FB
FB
FB
FB
Operating Current
Operating Current
Operating Current
Operating Current
CCL1
CCL2
CCH1
CCH2
–
–
–
Start Threshold
Stop Threshold
Hysteresis
GATEs switching, Soft Start charging
4.05
3.75
100
8.4
7.8
300
CCL
GATEs stop switching, Soft Start discharging
GATEs not switching, Soft Start not charging
GATEs switching, Soft Start charging
V
CCL
mV
V
CCL
Start Threshold
Stop Threshold
Hysteresis
CCH1
CCH1
CCH1
GATEs stop switching, Soft Start discharging
GATEs not switching, Soft Start not charging
V
mV
1. Guaranteed by design. Not tested in production.
PACKAGE PIN DESCRIPTION
PACKAGE PIN #
28 Lead SO Wide
1
PIN SYMBOL
FUNCTION
COMP
Output of the error amplifier and input for the PWM
comparators.
2
V
FB
Voltage Feedback Pin. To use Adaptive Voltage Positioning
(AVP) select an offset voltage at light load and connect a
resistor between V and V
. The input bias current of the
OUT
FB
V
FB
pin and the resistor value determine output voltage off-
set for zero output current. Short V to V
for no AVP.
FB
OUT
3
V
DRP
Current sense output for AVP. The offset of this pin above the
DAC voltage is proportional to the output current. Connect a
resistor from this pin to V to set amount AVP or leave this
FB
pin open for no AVP.
4–5
CS1–CS2
Current sense inputs. Connect current sense network for the
corresponding phase to each input.
6
7
CS
Reference for current sense amplifiers.
REF
PWRGD
Power Good Output. Open collector output goes low when
CS
is out of regulation.
REF
8
N/C
No connection.
9–12
V
ID3
–V
ID0
Voltage ID DAC inputs. These pins are internally pulled up to
3.3 V if left open.
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