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CS51413EDR8 参数 Datasheet PDF下载

CS51413EDR8图片预览
型号: CS51413EDR8
PDF下载: 下载PDF文件 查看货源
内容描述: [Switching Regulator, Current/voltage-mode, 4A, 594kHz Switching Freq-Max, PDSO8, 0.150 INCH, SO-8]
分类和应用: 开关光电二极管
文件页数/大小: 16 页 / 137 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
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Application Information  
Ceramic capacitors are now available in values over 10µF.  
Since the ceramic capacitor has low ESR and ESL, a single  
ceramic capacitor can be adequate for both low frequency  
and high frequency noises. The disadvantage of ceramic  
capacitors are their high cost. Solid tantalum capacitors can  
have low ESR and small size. However, the reliability of  
the tantalum capacitor is always a concern in the applica-  
tion where the capacitor may experience surge current.  
Output Capacitor  
In a buck converter, the requirements on the output capaci-  
tor are not as critical as those on the input capacitor. The  
current to the output capacitor comes from the inductor  
and thus is triangular. In most applications, this makes the  
RMS ripple current not an issue in selecting output capaci-  
tors.  
The output ripple voltage is the sum of a triangular wave  
caused by ripple current flowing through ESR, and a  
square wave due to ESL. Capacitive reactance is assumed  
to be small compared to ESR and ESL. The peak to peak  
ripple current of the inductor is:  
Figure 8: Input voltage ripple in a Buck converter.  
To calculate the RMS current, multiply the load current  
with the constant given by Figure 9 at each duty cycle. It is  
a common practice to select the input capacitor with an  
RMS current rating more than half the maximum load cur-  
rent. If multiple capacitors are paralleled, the RMS current  
for each capacitor should be the total current divided by  
the number of capacitors.  
VO(VIN – VO)  
IP – P  
=
(VIN)(L)(fS)  
V
RIPPLE(ESR), the output ripple due to the ESR, is equal to the  
product of IP – P and ESR. The voltage developed across the  
ESL is proportional to the di/ dt of the output capacitor. It  
is realized that the di/ dt of the output capacitor is the same  
as the di/ dt of the inductor current. Therefore, when the  
switch turns on, the di/ dt is equal to (VIN – VO)/ L, and it  
becomes VO/ L when the switch turns off. The total ripple  
voltage induced by ESL can then be derived from  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
V
L
VIN – V  
L
VIN  
L
V
RIPPLE(ESL) = ESL( IN ) + ESL(  
O ) = ESL(  
)
The total output ripple is the sum of the VRIPPLE(ESR) and  
VRIPPLE(ESR)  
.
0.8  
1
0.2  
0.4  
0.6  
0
Duty Cycle  
Figure 9: Input capacitor RMS current can be calculated by multiplying  
Y value with maximum load current at any duty cycle.  
Selecting the capacitor type is determined by each designs  
constraint and emphasis. The aluminum electrolytic capaci-  
tors are widely available at lowest cost. Their ESR and ESL  
(equivalent series inductor) are relatively high. Multiple  
capacitors are usually paralleled to achieve lower ESR. In  
addition, electrolytic capacitors usually need to be paral-  
leled with a ceramic capacitor for filtering high frequency  
noises. The OS-CON are solid aluminum electrolytic capac-  
itors, and therefore has a much lower ESR. Recently, the  
price of the OS-CON capacitors has dropped significantly  
so that it is now feasibly to use them for some low cost  
designs. Electrolytic capacitors are physically large, and not  
used in applications where the size, and especially height is  
the major concern.  
Figure 10: The output voltage ripple using two 10µF ceramic capacitors  
in parallel.  
9
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