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CS51033YDR8 参数 Datasheet PDF下载

CS51033YDR8图片预览
型号: CS51033YDR8
PDF下载: 下载PDF文件 查看货源
内容描述: 快PFET降压控制器不需要补偿 [Fast PFET Buck Controller Does Not Require Compensation]
分类和应用: 开关光电二极管控制器
文件页数/大小: 8 页 / 162 K
品牌: CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
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Applications Information: continued  
to 50mV peak to peak is:  
VOUT  
VIN  
50 × 10-3  
D =  
V  
I  
ESR =  
=
= 55mΩ  
0.6A  
From this, the maximum duty cycle DMAX is 53%, this  
occurs when VIN is at its minimum while the minimum  
duty cycle DMIN is 0.35%.  
The output capacitor should be chosen so that its ESR is at  
least half of the calculated value and the capacitance is at  
least ten times the calculated value. It is often advisable to  
use several capacitors in parallel to reduce the ESR.  
Low impedance aluminum electrolytic, tantalum or organic  
semiconductor capacitors are a good choice for an output  
capacitor. Low impedance aluminum are the cheapest but  
are not available in surface mount at present. Solid tantalum  
chip capacitors are available from a number of suppliers  
and offer the best choice for surface mount applications. The  
capacitor working voltage should be greater than the output  
voltage in all cases.  
2) Switching Frequency and on and off time calculations.  
FSW= 200KHz. The switching frequency is determined by  
COSC, whose value is determined by :  
95  
COSC  
=
470pF  
2
FSW  
30 × 10 3  
1-  
-
Fsw  
×
( (3 × 10 6 ) (  
) )  
FSW  
5) VFB Divider  
1
FSW  
T =  
= 5µs  
R1 + R2  
R2  
R1  
R2  
V
OUT = 1.25V  
= 1.25V  
+1  
(
)
(
)
TON(MAX) = 5µs × 0.53 = 2.65µs  
TON(MIN) = 5µs × 0.35 = 1.75µs  
TOFF(MAX) = 5µs 0.7µs = 4.3µs  
The input bias current to the comparator is 4µA. The resistor  
divider current should be considerably higher than this to  
ensure that there is sufficient bias current. If we choose the  
divider current to be at least 250 times the bias current this  
gives a divider current of 1mA and simplifies the calcula-  
tions.  
3) Inductor selection  
Pick the inductor value to maintain continuous mode opera-  
tion down to 0.3 Amps.  
1.5V  
1mA  
= R1+R2 = 1.5KΩ  
Let R2 = 1K  
The ripple current I = 2 × IOUT(MIN) = 2 × 0.3A = 0.6A.  
Rearranging the divider equation gives:  
VOUT + VD × ΤOFF(MAX)  
2.1V × 4.3µs  
VOUT  
1.25  
1.5V  
1.25  
LMIN  
=
=
15µH  
I  
R1 = R2  
-1 = 1KΩ  
= 200Ω  
0.6A  
(
)
(
)
The CS51033 will operate with almost any value of inductor.  
With larger inductors the ripple current is reduced and the  
regulator will remain in a continuous conduction mode for  
lower values of load current. A smaller inductor will result  
in larger ripple current. The core must not saturate with the  
maximum expected current, here given by:  
6) Divider bypass capacitor Crr  
Since the feedback resistors divide the output voltage by a  
factor of 4, i.e. 5V/1.25V= 4 it follows that the output ripple  
is also divided by four. This would require that the output  
ripple be at least 60mV (4 × 15mV) to trip the feedback com-  
pactor. We use a capacitor Crr to act as an ac short so that  
the output ripple is not attenuated by the divider network.  
The ripple voltage frequency is equal to the switching fre-  
quency so we choose Crr so that:  
IOUT + I  
IMAX  
=
= 3A + 0.6A/2 = 3.3A  
2
1
4) Output Capacitor  
XC =  
2πfC  
The output capacitor limits the output ripple voltage. The  
CS51033 needs a maximum of 15mV of output ripple for the  
feedback comparator to change state. If we assume that all  
the inductor ripple current flows through the output capaci-  
tor and that it is an ideal capacitor (i.e. zero ESR), the mini-  
mum capacitance needed to limit the output ripple to 50mV  
peak to peak is given by:  
is negligible at the switching frequency.  
In this case FSW is 200kHz if we allow XC = 3then:  
1
2πf3  
C =  
0.265µF  
7) Soft start and Fault timing capacitor CS.  
CS performs several important functions. First it provides a  
dead time for load transients so that the IC does not enter a  
fault mode every time the load changes abruptly. Secondly  
it disables the fault circuitry during startup, it also provides  
soft start by clamping the reference voltage during startup  
0.6A  
I  
C
11.4µF  
O = 8 × FSW × V  
=
8 × (200 × 103 Hz) × (33 × 10-3V)  
The minimum ESR needed to limit the output voltage ripple  
6