CAT28C256
A.C. CHARACTERISTICS, Write Cycle
VCC=5V+10%, unless otherwise specified
28C256-12
28C256-15
Symbol Parameter
Min. Max. Min. Max.
Units
ms
ns
tWC
tAS
tAH
tCS
tCH
tCW
Write Cycle Time
Address Setup Time
Address Hold Time
CE Setup Time
5
5
0
0
50
0
50
0
ns
ns
CE Hold Time
0
0
ns
(3)
CE Pulse Time
100
0
100
0
ns
tOES
tOEH
OE Setup Time
ns
OE Hold Time
0
0
ns
(3)
tWP
tDS
WE Pulse Width
100
50
10
5
100
50
10
5
ns
Data Setup Time
Data Hold Time
ns
tDH
ns
(1)
tINIT
Write Inhibit Period After Power-up
Byte Load Cycle Time
10
10
ms
µs
(1)(4)
tBLC
0.1
100
0.1
100
Figure 1. A.C. Testing Input/Output Waveform(2)
2.4 V
2.0 V
0.8 V
INPUT PULSE LEVELS
0.45 V
REFERENCE POINTS
5096 FHD F03
Figure 2. A.C. Testing Load Circuit (example)
1.3V
1N914
3.3K
DEVICE
UNDER
TEST
OUT
C
= 100 pF
L
5096 FHD F04
C
INCLUDES JIG CAPACITANCE
L
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) Input rise and fall times (10% and 90%) < 10 ns.
(3) A write pulse of less than 20ns duration will not initiate a write cycle.
(4) A timer of duration t
max. begins with every LOW to HIGH transition of WE. If allowed to time out, a page or byte write will begin;
BLC
however a transition from HIGH to LOW within t
max. stops the timer.
BLC
Doc. No. 25020-0A 2/98
5
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