CAT28C256
ABSOLUTE MAXIMUM RATINGS*
*COMMENT
Temperature Under Bias ................. –55°C to +125°C
Storage Temperature....................... –65°C to +150°C
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation
of the device at these or any other conditions outside of
those listed in the operational sections of this specifica-
tion is not implied. Exposure to any absolute maximum
rating for extended periods may affect device perfor-
mance and reliability.
Voltage on Any Pin with
Respect to Ground(2) ........... –2.0V to +VCC + 2.0V
VCC with Respect to Ground ............... –2.0V to +7.0V
Package Power Dissipation
Capability (Ta = 25°C)................................... 1.0W
Lead Soldering Temperature (10 secs) ............ 300°C
Output Short Circuit Current(3) ........................ 100 mA
RELIABILITY CHARACTERISTICS
Symbol
Parameter
Endurance
Min.
104 or 105
100
Max.
Units
Cycles/Byte
Years
Test Method
(1)
NEND
MIL-STD-883, Test Method 1033
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
JEDEC Standard 17
(1)
TDR
Data Retention
ESD Susceptibility
Latch-Up
(1)
VZAP
2000
Volts
(1)(4)
ILTH
100
mA
D.C. OPERATING CHARACTERISTICS
VCC = 5V ±10%, unless otherwise specified.
Limits
Symbol
Parameter
Min. Typ.
Max.
Units
Test Conditions
ICC
VCC Current (Operating, TTL)
30
mA
CE = OE = VIL, f=8MHz
All I/O’s Open
(5)
ICCC
VCC Current (Operating, CMOS)
25
mA
CE = OE = VILC, f=8MHz
All I/O’s Open
ISB
VCC Current (Standby, TTL)
VCC Current (Standby, CMOS)
1
mA
CE = VIH, All I/O’s Open
(6)
ISBC
150
µA
CE = VIHC,
All I/O’s Open
ILI
Input Leakage Current
Output Leakage Current
–10
–10
10
10
µA
µA
VIN = GND to VCC
ILO
VOUT = GND to VCC
,
CE = VIH
(6)
VIH
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
Write Inhibit Voltage
2
VCC +0.3
0.8
V
V
V
V
V
(5)
VIL
–0.3
2.4
VOH
VOL
VWI
IOH = –400µA
0.4
IOL = 2.1mA
3.5
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is V +0.5V, which may overshoot to V +2.0V for periods of less than 20 ns.
CC
CC
(3) Output shorted for no more than one second. No more than one output shorted at a time.
(4) Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to V +1V.
CC
(5) V
(6) V
= –0.3V to +0.3V.
ILC
= V –0.3V to V +0.3V.
IHC
CC
CC
Doc. No. 25020-0A 2/98
3
CATALYST [ CATALYST SEMICONDUCTOR ]
