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BS616LV2019TC 参数 Datasheet PDF下载

BS616LV2019TC图片预览
型号: BS616LV2019TC
PDF下载: 下载PDF文件 查看货源
内容描述: 非常低的功率/电压CMOS SRAM 128K ×16位 [Very Low Power/Voltage CMOS SRAM 128K X 16 bit]
分类和应用: 静态存储器
文件页数/大小: 10 页 / 283 K
品牌: BSI [ BRILLIANCE SEMICONDUCTOR ]
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BS616LV2019  
BSI  
„ PIN DESCRIPTIONS  
Name  
Function  
A0-A16 Address Input  
These 17 address inputs select one of the 131,072 x 16-bit words in the RAM.  
CE is active LOW and CE2 is active HIGH. Both chip enables must be active when  
data read from or write to the device. If either chip enable is not active, the device is  
deselected and is in a standby power mode. The DQ pins will be in the high  
impedance state when the device is deselected. (48B BGA ignore CE2 pin)  
CE Chip Enable 1 Input  
CE2 Chip Enable 2 Input  
WE Write Enable Input  
The write enable input is active LOW and controls read and write operations. With the  
chip selected, when WE is HIGH and OE is LOW, output data will be present on the  
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the  
selected memory location.  
OE Output Enable Input  
The output enable input is active LOW. If the output enable is active while the chip is  
selected and the write enable is inactive, data will be present on the DQ pins and they  
will be enabled. The DQ pins will be in the high impedance state when OE is inactive.  
Lower byte and upper byte data input/output control pins.  
LB and UB Data Byte Control Input  
DQ0 - DQ15 Data Input/Output  
Ports  
These 16 bi-directional ports are used to read data from or write data into the RAM.  
Vcc  
Power Supply  
Ground  
Gnd  
„ TRUTH TABLE  
MODE  
CE  
H
CE2 (1) WE  
OE  
X
LB  
X
UB  
D0~D7  
High Z  
High Z  
High Z  
High Z  
Dout  
D8~D15  
High Z  
High Z  
High Z  
High Z  
Dout  
Vcc CURRENT  
X
L
X
X
X
X
H
X
L
ICCSB , ICCSB1  
Not selected  
(Power Down)  
X
X
X
ICCSB , ICCSB1  
X
L
ICCSB , ICCSB1  
X
H
X
H
X
H
H
X
Output Disabled  
Read  
ICC  
ICC  
ICC  
ICC  
ICC  
ICC  
ICC  
L
H
L
L
L
H
H
H
L
L
L
High Z  
Dout  
Dout  
H
L
High Z  
Din  
L
Din  
Write  
X
H
L
L
X
Din  
H
Din  
X
1. 48B BGA ignore CE2 condition.  
Revision 1.2  
May 2004  
R0201-BS616LV2019  
2