Very Low Power CMOS SRAM
128K X 16 bit
Pb-Free and Green package materials are compliant to RoHS
BS616LV2016
n
FEATURES
Ÿ
Wide V
C C
operation voltage : 2.4V ~ 5.5V
Ÿ
Very low power consumption :
V
CC
= 3.0V
Operation current : 30mA (Max.) at 55ns
2mA (Max.) at 1MHz
O
Standby current : 0.1uA (Typ.) at 25 C
V
CC
= 5.0V
Operation current : 62mA (Max.) at 55ns
8mA (Max.) at 1MHz
O
Standby current : 0.6uA (Typ.) at 25 C
Ÿ
High speed access time :
-55
55ns(Max.) at V
CC
=3.0~5.5V
-70
70ns(Max.) at V
CC
=2.7~5.5V
Ÿ
Automatic power down when chip is deselected
Ÿ
Easy expansion with CE and OE options
Ÿ
I/O Configuration x8/x16 selectable by LB and UB pin.
Ÿ
Three state outputs and TTL compatible
Ÿ
Fully static operation
Ÿ
Data retention supply voltage as low as 1.5V
n
DESCRIPTION
The BS616LV2016 is a high performance, very low power CMOS
Static Random Access Memory organized as 131,072 by 16 bits and
operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical CMOS standby
current of 0.1uA at 3.0V/25
O
C and maximum access time of 55ns at
3.0V/125
O
C.
Easy memory expansion is provided by an active LOW chip enable
(CE) and active LOW output enable (OE) and three-state output
drivers.
The BS616LV2016 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS616LV2016 is available in DICE form, JEDEC standard
44-pin TSOP II package.
n
POWER CONSUMPTION
POWER DISSIPATION
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Automotive
Grade
O
O
-40 C to +125 C
STANDBY
(I
C CS B 1
, Typ.)
(I
CCS B1
, Max)
Operating
(I
CC
, Max)
PKG TYPE
V
CC
=5.0V V
CC
=3.0V V
CC
=5.0V V
CC
=3.0V
V
CC
=5.0V
1MHz
f
M ax.
V
CC
=3.0V
1MHz
f
M ax.
BS616LV2016EA
0.6uA
0.1uA
25uA
15uA
8mA
62mA
2mA
30mA
TSOP II-44
n
PIN CONFIGURATIONS
n
BLOCK DIAGRAM
A4
A3
A2
A1
A0
CE
DQ0
DQ1
DQ2
DQ3
VCC
VSS
DQ4
DQ5
DQ6
DQ7
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
BS616LV2016EC
BS616LV2016EI
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
D Q15
D Q14
D Q13
D Q12
VSS
VCC
D Q11
D Q10
D Q9
D Q8
NC
A8
A9
A10
A11
NC
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
Address
Input
Buffer
10
Row
D ecoder
1024
Memory Arra y
1024 x 2048
2048
DQ0
.
.
.
.
.
.
D Q15
CE
WE
OE
UB
LB
V
CC
V
SS
16
.
.
.
.
.
.
Data
Input
Buffer
16
128
C olumn Decoder
7
C ontrol
Address Input Buffer
16
C olumn I/O
Write Driver
Sense Amp
16
Data
Output
Buffer
A12 A13 A14 A15 A16 A0
A1
Brilliance Semiconductor, Inc.
reserves the right to change products and specifications without notice.
R0201-BS66LV2016A
1
Revision 1.2A
Mar.
2006
BSI [ BRILLIANCE SEMICONDUCTOR ]
