PIN CONFIGURATION
PIN DESCRIPTIONS
Top View
SSOP
PIN
NAME
DESCRIPTION
1
2
3
4
5
AIN0
AIN1
AIN2
AIN3
VREF
Analog Input Channel 0
Analog Input Channel 1
Analog Input Channel 2
Analog Input Channel 3
AIN0
AIN1
AIN2
AIN3
VREF
1
2
3
4
5
6
7
8
8
28 VANA
27 VDIG
26 A1
Voltage Reference Input. See Specifications Tables
for ranges.
25 A0
6
AGND
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DGND
DB4
DB3
DB2
DB1
DB0
RD
Analog Ground
Data Bit 11 (MSB)
Data Bit 10
Data Bit 9
24 CLK
23 BUSY
22 WR
21 CS
7
AGND
DB11
DB10
DB9
8
9
ADS7842E
10
11
12
13
14
15
16
17
18
19
20
Data Bit 8
Data Bit 7
20 RD
Data Bit 6
Data Bit 5
DB8 10
DB7 11
19 DB0
18 DB1
17 DB2
16 DB3
15 DB4
Digital Ground
Data Bit 4
DB6 12
Data Bit 3
Data Bit 2
DB5 13
Data Bit 1
DGND 14
Data Bit 0 (LSB)
Read Input. Active LOW. Reads the data outputs in
combination with CS.
21
CS
Chip Select Input. Active LOW. The combination of
CS taken LOW and WR taken LOW initiates a new
conversion and places the outputs in the tri-state
mode.
ABSOLUTE MAXIMUM RATINGS(1)
+VCC to GND ........................................................................ –0.3V to +6V
Analog Inputs to GND ............................................ –0.3V to +VCC + 0.3V
Digital Inputs to GND ........................................................... –0.3V to +6V
Power Dissipation .......................................................................... 250mW
Maximum Junction Temperature ................................................... +150°C
Operating Temperature Range ........................................–40°C to +85°C
Storage Temperature Range .........................................–65°C to +150°C
Lead Temperature (soldering, 10s)............................................... +300°C
22
23
WR
Write Input. Active LOW. Starts a new conversion
and selects an analog channel via address inputs A0
and A1, in combination with CS.
BUSY
BUSY goes LOW and stays LOW during a
conversion. BUSY rises when a conversion is
complete and enables the parallel outputs.
24
CLK
External Clock Input. The clock speed determines the
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
conversion rate by the equation fCLK = 16 • fSAMPLE
.
25, 26
A0, A1
Address Inputs. Selects one of four analog input
channels in combination with CS and WR. The
address inputs are latched on the rising edge of
either RD or WR.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown recom-
mends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
A0
0
A1
0
Channel Selected
AIN0
AIN1
AIN2
AIN3
0
1
1
0
1
1
27
28
VDIG
Digital Supply Input. Nominally +5V.
Analog Supply Input. Nominally +5V.
VANA
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION
MINIMUM
RELATIVE
ACCURACY
(LSB)
SPECIFICATION
TEMPERATURE
RANGE
PACKAGE
DRAWING
NUMBER
SINAD
(dB)
ORDERING
NUMBER(1)
TRANSPORT
MEDIA
PRODUCT
PACKAGE
ADS7842E
±2
"
±1
"
68
"
70
"
–40°C to +85°C
SSOP-28
324
"
324
"
ADS7842E
ADS7842E/1K
ADS7842EB
Rails
Tape and Reel
Rails
"
"
"
ADS7842EB
"
–40°C to +85°C
SSOP-28
"
"
ADS7842EB/1K
Tape and Reel
NOTES: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces
of “ADS7842E/1K” will get a single 1000-piece Tape and Reel.
®
ADS7842
4
BB [ BURR-BROWN CORPORATION ]
