ELECTRICAL CHARACTERISTICS (Cont.)
At TA = –40°C to +85°C, fS = 40kHz, VS = +5V ±5%, using internal reference, unless otherwise specified.
ADS7813P, U
ADS7813PB, UB
TYP
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
MAX
UNITS
SAMPLING DYNAMICS
Aperture Delay
Aperture Jitter
Transient Response
Overvoltage Recovery(7)
40
20
5
ꢀ
ꢀ
ꢀ
ꢀ
ns
ps
µs
ns
FS Step
750
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
Internal Reference Drift
External Reference Voltage Range
External Reference Current Drain
CAP Compensation Capacitors ESR(8)
2.48
2.3
2.5
100
8
2.52
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
V
µA
ppm/°C
V
µA
Ω
2.5
2.7
100
3
ꢀ
ꢀ
ꢀ
V
REF = +2.5V
DIGITAL INPUTS
Logic Levels
VIL
VIH
IIL
–0.3
+2.0
+0.8
VS +0.3V
±10
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
V
V
µA
µA
(9)
IIH
±10
Serial
DIGITAL OUTPUTS
Data Format
Data Coding
VOL
Binary Two’s Complement
ISINK = 1.6mA
ISOURCE = 500µA
High-Z State,
+0.4
ꢀ
ꢀ
V
V
µA
VOH
+4
ꢀ
Leakage Current
±1
V
OUT = 0V to VS
High-Z State
Output Capacitance
15
15
pF
POWER SUPPLY
VS
Power Dissipation
+4.75
+5
+5.25
35
ꢀ
ꢀ
ꢀ
ꢀ
V
mW
fS = 40kHz
TEMPERATURE RANGE
Specified Performance
Derated Performance
–40
–55
+85
+125
ꢀ
ꢀ
ꢀ
ꢀ
°C
°C
ꢀ Same specification as grade to the left.
NOTES: (1) LSB means Least Significant Bit. For the ±10V input range, one LSB is 305µV.
(2) Typical rms noise at worst case transitions and temperatures.
(3) Full scale error is the worst case of –Full Scale or +Full Scale untrimmed deviation from ideal first and last code transitions, divided by the
transition voltage (not divided by the full-scale range) and includes the effect of offset error.
(4) After the ADS7813 is initially powered on and fully settles, this is the time delay after it is brought out of Power Down Mode until all internal
settling occurs and the analog input is acquired to rated accuracy, and normal conversions can begin again.
(5) All specifications in dB are referred to a full-scale input.
(6) Useable Bandwidth defined as Full-Scale input frequency at which Signal-to-(Noise+Distortion) degrades to 60dB, or 10 bits of accuracy.
(7) Recovers to specified performance after 2 x FS input overvoltage.
(8) ESR = total equivalent series resistance for the compensation capacitors.
(9) The minimum VIH level for the DATACLK signal is 3V.
ADS7813
SBAS043C
3
www.ti.com
BB [ BURR-BROWN CORPORATION ]
