a conversion, R/C should be taken LOW at least 100ns
before CS is taken LOW. R/C and/or CS should be taken
HIGH during the early part of the conversion, preferably
within 200ns of the start of the conversion. If these times are
not observed, then there is risk that the transition of these
digital signals may affect the conversion result.
to that listed in the Specifications Table. The range for the
external reference is 2.3V to 2.7V. While the ADS7811 will
operate using an external reference, the specifications are
only guaranteed when the internal reference is used.
REF PIN
The three NAND gates shown in Figure 1 can be used to
generate R/C and CS signals from a single negative going
pulse. The pulse must not be longer than 3.3µs or a second
conversion may be initiated immediately after the first.
The REF pin itself should be bypassed with a 0.1µF ceramic
capacitor in parallel with a 2.2µF tantalum capacitor. While
both capacitors should be physically close to the ADS7811,
it is very important that the ceramic capacitor be placed as
close as possible.
BUSY
The REF voltage should not be used to drive a large load or
any load which is dynamic. A large load will reduce the
reference voltage and the corresponding input range of the
converter. A dynamic load will modulate the reference
voltage and this modulation will be present in the converter’s
output data.
BUSY goes LOW when a conversion is started and remains
LOW throughout the conversion. Just prior to BUSY going
HIGH, the digital outputs become active with the conversion
result. Time t11, shown in Figure 2, should provide adequate
time for the ADS7811 to drive the digital outputs to a valid
logic state before BUSY rises. As shown in Figure 1 and 2,
the rising edge of BUSY can be used to latch the digital
result into an external component.
CAP PIN
The voltage on the CAP pin is the output of the reference
buffer. This pin should be bypassed with a 0.1µF ceramic
capacitor in parallel with a 2.2µF tantalum capacitor. While
both capacitors should be physically close to the ADS7811,
it is very important that the ceramic capacitor be placed as
close as possible.
DIGITAL OUTPUT
The ADS7811’s digital output is in Binary Two’s Comple-
ment (BTC) format. Table III shows the relationship be-
tween the digital output word and analog input voltage under
ideal conditions.
The CAP pin connects to the internal reference buffer and
directly to the binary weighted capacitor array of the con-
verter. Thus, the signal at the CAP pin has high-frequency
glitches which occur at each bit decision. For this reason, the
CAP voltage should not be used to provide a reference
voltage for external circuitry.
DIGITAL OUTPUT
BINARY TWO’S COMPLEMENT
ANALOG
DESCRIPTION
INPUT
BINARY CODE
HEX CODE
Full Scale Range
±2.5V
76µV
Least Significant
Bit (LSB)
LAYOUT
+Full Scale
(2.5V – 1LSB)
2.499924V
0V
0111 1111 1111 1111
0000 0000 0000 0000
7FFF
0000
The layout of the ADS7811 and accompanying components
will be critical for optimum performance. Use of an analog
ground plane is essential. Use of +5V and –5V power planes
is not critical as long as the supplies are well bypassed, and
the traces connecting +5V and –5V to the power connector
are not too long or too thin.
Midscale
One LSB below
Midscale
–76µV
1111 1111 1111 1111
1000 0000 0000 0000
FFFF
8000
–Full Scale
–2.5V
Table III. Ideal Input Voltages and Output Codes.
The two +VS power pins of the ADS7811 must be tied
together. The voltage source for these pins should also
power the input buffer and the 74HC00 shown in Figure 1.
This supply should separate from the positive +5V supply
for the system’s digital logic
REFERENCE
The ADS7811 can be operated with the internal 2.5V refer-
ence or an external reference. By applying an external
reference to the REF pin, the internal reference is bypassed.
The reference voltage at REF is buffered internally.
Three ground pins are present on the ADS7811: pin 2, pin 5,
and pin 14. These should all be tied to the analog ground
plane. The analog ground plane should extend underneath
all analog signal conditioning components and up to the
74HC574s (or equivalent components) shown in Figure 1.
The 74HC574s should not be located more than several
inches from the ADS7811.
The voltage at the reference input sets the full-scale range of
the converter. With the internal 2.5V reference, the input
range is ±2.5V. Thus, the input range of the converter’s
analog input is simply ±VREF, where VREF is the voltage at
the reference input. Because of internal gain and offset error,
the input range will not be exactly ±VREF. The full-scale
error of the converter with an external reference will typi-
cally be 0.25% or less. The bipolar zero error will be similar
The ground for the 74HC574s should be connected to the
digital ground. The analog ground plane should extend up to
®
8
ADS7811
BB [ BURR-BROWN CORPORATION ]
