SPECIFICATIONS (CONT)
ELECTRICAL
At TA = TMIN to TMAX, Sampling Frequency, fS, = 333kHz, –VS = –15V, VS = +5V, unless otherwise specified.
ADS7800JP/JU/AH
ADS7800KP/KU/BH
MIN TYP
PARAMETER
CONDITIONS
MIN
TYP
MAX
MAX
UNITS
TEMPERATURE RANGE
Specification
JP/JU/KP/KU
AH/BH
JP/KP/JU/KU
0
+70
+85
+85
*
*
*
*
*
*
*
*
°C
°C
°C
°C
–40
–40
–65
Operating
Storage
+150
* Same as specification for ADS7800JP/JU/AH.
NOTES: (1) Adjustable to zero with external potentiometer. (2) LSB means Least Significant Bit. For ADS7800, 1LSB = 2.44mV for the ±5V range, 1LSB =
4.88mV for the ±10V range. (3) Noise was characterized over temperature near full scale, 0V, and negative full scale. 0.1LSB represents a typical rms level of
noise at the worst case, which was near full scale input at +125°C. (4) All specifications in dB are referred to a full-scale input, either ±10V or ±5V. (5) For full
scale step input, 12-bit accuracy attained in specified time. (6) Recovers to specified performance in specified time after 2 x FS input overvoltage.
ABSOLUTE MAXIMUM RATINGS
ELECTROSTATIC
DISCHARGE SENSITIVITY
–VS to ANALOG COMMON ............................................................ –16.5V
VS to DIGITAL COMMON .................................................................... +7V
Pin 23 (VSD ) to Pin 24 (VSA ) ........................................................... ±0.3V
ANALOG COMMON to DIGITAL COMMON........................................ ±1V
Control Inputs to DIGITAL COMMON ............................. –0.3 to VS + 0.3V
Analog Input Voltage .......................................................................... ±20V
Maximum Junction Temperature ..................................................... 160°C
Internal Power Dissipation ............................................................. 750mW
Lead Temperature (soldering, 10s)................................................ +300°C
The ADS7800 is an ESD (electrostatic discharge) sensitive
device. The digital control inputs have a special FET struc-
ture, which turns on when the input exceeds the supply by
18V, tominimizeESDdamage. However, permanentdamage
may occur on unconnected devices subject to high energy
electrostatic fields. When not in use, devices must be stored in
conductive foam or shunts. The protective foam should be
discharged to the destination socket before devices are re-
moved.
Thermal Resistance, θJA
:
Plastic DIP ................................................................................ 100°C/W
SOIC ......................................................................................... 100°C/W
Ceramic ...................................................................................... 50°C/W
PACKAGE/ORDERING INFORMATION
INTEGRAL
LINEARITY
ERROR (LSB)
SIGNAL-TO-
(NOISE+DISTORTION)
RATIO (dB min)
SPECIFICATION
TEMPERATURE
RANGE (°C)
PACKAGE DRAWING
NUMBER(1)
PRODUCT
PACKAGE
ADS7800JP
ADS7800KP
±1
±1/2
67
69
0 to +70
0 to +70
24-Pin Plastic DIP
24-Pin Plastic DIP
243
243
ADS7800JU
ADS7800KU
±1
±1/2
67
69
0 to +70
0 to +70
24-Pin Plastic SOIC
24-Pin Plastic SOIC
239
239
ADS7800AH
ADS7800BH
±1
±1/2
67
69
–40 to +85
–40 to +85
24-Pin Ceramic DIP
24-Pin Ceramic DIP
245
245
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
3
ADS7800
BB [ BURR-BROWN CORPORATION ]
