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SBAS305A − JANUARY 2004 − REVISED FEBRUARY 2004
SWITCHING CHARACTERISTICS
T
= −40°C, T = +85°C. Typical values are at T = 25°C, clock frequency = maximum specified, 50% clock duty cycle, AVDD = 3.3V,
MIN
MAX A
LVDD = 3.3V, −0.5dBFS, internal voltage reference, and 2V
differential input, unless otherwise noted.
PP
MIN
TYP
MAX
PARAMETER
CONDITIONS
UNITS
SWITCHING SPECIFICATIONS
t
14.3
50
ns
ps
SAMPLE
t (A) Aperture Delay
120
1
D
Aperture Jitter (uncertainty)
ps
t (pipeline) Latency
6.5
5
cycles
ns
D
t
Propagation Delay
PROP
SERIAL INTERFACE TIMING
Data is shifted in MSB first.
Outputs change on
next rising clock edge
after CS goes high.
ADCLK
Start Sequence
CS
t1
Data latched on
each rising edge of SCLK.
t2
SCLK
t3
SDATA
MSB
D6
D5
D4
D3
D2
D1
D0
t4
t5
PARAMETER
DESCRIPTION
MIN
50
13
13
5
TYP
MAX
UNIT
ns
t
1
t
2
t
3
t
4
t
5
Serial CLK Period
Serial CLK High Time
Serial CLK Low Time
Data Setup Time
ns
ns
ns
Data Hold Time
5
ns
5
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