ꢍꢓ ꢋꢀ ꢙ ꢈ ꢉ
ꢍꢓ ꢋꢀ ꢙ ꢈ ꢙ
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SBAS280C − JUNE 2003 − REVISED JUNE 2004
PARAMETER MEASUREMENT INFORMATION
t2
t1
CLK
t2
t3
t4
t4
DRDY
t6
t5
DOUT[17:0]
Data N
Data N + 1
Data N + 2
NOTE: CS and RD tied low.
Figure 1. Data Retrieval Timing (ADS1625, ADS1626 with FIFO Disabled)
RD, CS
t7
t8
DOUT[17:0]
Figure 2. DOUT Inactive/Active Timing (ADS1625, ADS1626 with FIFO Disabled)
TIMING REQUIREMENTS FOR FIGURE 1 AND FIGURE 2
SYMBOL
DESCRIPTION
MIN
20
1
TYP
25
MAX
1000
50
UNIT
t
1
ns
MHz
ns
CLK period (1/f
)
CLK
1/t
1
40
f
CLK
t
2
10
CLK pulse width, high or low
t
3
10
ns
Rising edge of CLK to DRDY low
t
4
16 t
1
ns
DRDY pulse width high or low
t
10
15
15
15
ns
Falling edge of DRDY to data invalid
5
t
6
ns
Falling edge of DRDY to data valid
t
7
ns
Rising edge of RD and/or CS inactive (high) to DOUT high impedance
Falling edge of RD and/or CS active (low) to DOUT active.
t
8
ns
NOTE: DOUT[17:0] and DRDY load = 10pF.
8
BB [ BURR-BROWN CORPORATION ]
