ꢍ ꢓꢋ ꢀꢙ ꢈꢉ
ꢍ ꢓꢋ ꢀꢙ ꢈꢙ
www.ti.com
SBAS280C − JUNE 2003 − REVISED JUNE 2004
PIN ASSIGNMENTS
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1
2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
AGND
AVDD
AGND
AINN
FIFO_LEV[2] (ADS1626 Only)
ADS1625
ADS1626
FIFO_LEV[1] (ADS1626 Only)
FIFO_LEV[0] (ADS1626 Only)
NC
3
4
5
AINP
DOUT[17]
6
AGND
AVDD
RBIAS
AGND
AVDD
AGND
AVDD
REFEN
IOVDD
DGND
NC
DOUT[16]
TQFP PACKAGE
(TOP VIEW)
7
DOUT[15]
8
DOUT[14]
PowerPADTM
9
DOUT[13]
10
11
12
13
14
15
16
DOUT[12]
DOUT[11]
DOUT[10]
DOUT[9]
DOUT[8]
DOUT[7]
DOUT[6]
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Terminal Functions
TERMINAL
TYPE
DESCRIPTION
NAME
AGND
AVDD
AINN
NO.
1, 3, 6, 9, 11, 55, 57
Analog
Analog
Analog ground
2, 7, 10, 12, 58
Analog supply
4
Analog input
Analog input
Analog
Negative analog input
Positive analog input
AINP
5
RBIAS
REFEN
NC
8
Terminal for external analog bias setting resistor
Internal reference enable. Internal pull-down resistor of 170kΩ to DGND.
Must be left unconnected
13
Digital input: active low
16, 45, 49, 50
PD
17
Digital input: active low
Digital
Power down all circuitry. Internal pull-up resistor of 170kΩ to DGND.
Digital supply
DVDD
DGND
RESET
CS
18, 26, 52
15, 19, 25, 51, 54
Digital
Digital ground
20
21
Digital input: active low
Digital input: active low
Digital input: active low
Digital output
Reset digital filter
Chip select
RD
22
Read enable
OTR
23
Active when analog inputs are out of range
Data ready on falling edge
DRDY
DOUT [17:0]
FIFO_LEV[2:0]
24
Digital output: active low
Digital output
27−44
46−48
Data output. DOUT[17] is the MSB and DOUT[0] is the LSB.
Digital input
FIFO level (for the ADS1626 only). FIFO_LEV[2] is MSB.
NOTE: These terminals must be left unconnected on the ADS1625.
IOVDD
CLK
14, 53
56
Digital
Digital input
Analog
Digital I/O supply
Clock input
VCAP
VREFN
VMID
59
Terminal for external bypass capacitor connection to internal bias voltage
Negative reference voltage
60, 61
62
Analog
Analog
Midpoint voltage
VREFP
63, 64
Analog
Positive reference voltage
7