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SBAS341B − DECEMBER 2004 − REVISED APRIL 2005
PIN ASSIGNMENTS
48 47 46 45 44 43 42 41 40 39 38 37
AGND
AVDD
AGND
AINN
1
2
3
4
5
6
7
8
9
36
DGND
35 NC
34 DVDD
33 DGND
32 FSO
AINP
AGND
AVDD
RBIAS
AGND
31
30
29
FSO
TQFP PACKAGE
(TOP VIEW)
ADS1602
DOUT
DOUT
28 SCLK
27
AVDD 10
SCLK
11
12
AGND
AVDD
26 NC
25 NC
13 14 15 16 17 18 19 20 21 22 23 24
Terminal Functions
TERMINAL
FUNCTION
DESCRIPTION
NAME
AGND
AVDD
AINN
NO.
1, 3, 6, 9, 11, 39, 41
Analog
Analog
Analog ground
2, 7, 10, 12, 42
Analog supply
4
Analog input
Analog input
Analog
Negative analog input
Positive analog input
AINP
5
RBIAS
REFEN
NC
8
Terminal for external analog bias setting resistor.
Internal reference enable. Internal pull-down resistor of 170kΩ to DGND.
These terminals must be left unconnected.
Pull-up to DVDD with 10kΩ resistor (see Figure 53).
Power down all circuitry. Internal pull-up resistor of 170kΩ to DGND.
Digital supply
13
Digital input: active low
Do not connect
Digital Input
Digital input: active low
Digital
14, 16, 24−26, 35
RPULLUP
PD
15
17
DVDD
DGND
SYNC
OTR
18, 23, 34
19, 22, 33, 36, 38
Digital
Digital ground
20
21
Digital input
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Digital
Synchronization control input
Indicates analog input signal is out of range.
Serial clock output
SCLK
SCLK
DOUT
DOUT
FSO
28
27
Serial clock output, complementary signal.
Data output
30
29
Data output, complementary signal.
Frame synchronization output
32
FSO
31
Frame synchronization output, complementary signal.
Digital I/O supply
IOVDD
CLK
37
40
Digital input
Analog
Clock input
VCAP
VREFN
VMID
VREFP
43
Terminal for external bypass capacitor connection to internal bias voltage.
Negative reference voltage
44, 45
46
Analog
Analog
Midpoint voltage
47, 48
Analog
Positive reference voltage
7
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