AZ100LVEL16VR
MLP 16 (VRL) AND DIE (VRX)
D
EN (EN-SEL NC)
(PECL)
EN (EN-SEL CONNECTED TO VEE
(CMOS)
or VCC
)
Q
Q
QHG
QHG
TIMING DIAGRAM
DIE PAD COORDINATES
X
(Microns)
-342.5
-342.5
-342.5
-342.5
-33.5
126.5
312.5
312.5
312.5
Y
(Microns)
312.5
144.5
-87.0
-255.0
-312.5
-312.5
-248.5
-98.5
EL16VR
NAME
SIGNAL
L K
J
M
A
B
A
B
C
D
E
F
G
H
I
D
D¯
VBB
EN
DIE SIZE: 950u X 940u
DIE THICKNESS: 14 MILS
BOND PAD: 85u X 85u
VEE
I
VEEP
EN-SEL
Q¯HG
QHG
CS-SEL
VCC
Q
C
D
H
G
51.5
J
312.5
302.5
142.5
-140.5
201.5
342.5
342.5
342.5
K
L
M
E F
Q¯
Notes: 1. Other die thicknesses available. Contact
factory for further information.
2. The die backside may be left open or
connected to VEE
.
April 2007 * REV - 15
www.azmicrotek.com
3
AZM [ ARIZONA MICROTEK, INC ]
