EEPROM
AS58C1001
Austin Semiconductor, Inc.
(EXAMPLE)
Vcc
RES\
*unprogrammable
*unprogrammable
Write Data
(Normal Data Input)
FUNCTIONAL DESCRIPTION (continued)
Write Address
5555
DATA PROTECTION (continued)
2. Data protection at Vcc on/off.
AA
55
When RES\ is low, the EEPROM cannot be erased and
programmed. Therefore, data can be protected by keeping
RES\ low when Vcc is switched. RES\ should be high during
programming because it does not provide a latch function.
When Vcc is turned on or off, noise on the control pins
generated by external circuits (CPU, etc.) may turn the
EEPROM to programming mode by mistake. To prevent this
unintentional programming, the EEPROM must be kept in an
unprogrammable, standby or readout state by using a CPU
reset signal to RES\ pin.
2AAA
5555
A0
The Software data protection mode can be cancelled by
inputting the following 6 Bytes. This changes the AS58C1001
to the Non-Protection mode, for normal operation.
In addition, when RES\ is kept high at Vcc on/off timing,
the input level of control pins (CE\, OE\, WE\) must be held
as CE\=Vcc or OE\=LOW or WE\=Vcc level.
Address
Data
5555
AA
3. Software Data Protection
To protect against unintentional programming caused by
noise generated by external circuits, AS58C1001 has a
Software data protection function. To initate Software data
protection mode, 3 bytes of data must be input, followed by a
dummy write cycle of any address and any data byte. This
exact sequence switches the device into protection mode. This
4th cycle during write is required to initiate the SDP and
physically writes the address and data. While in SDP the
entire array is protected in which writes can only occur if the
exact SDP sequence is re-executed or the unprotect sequence
2AAA
5555
55
80
5555
AA
55
2AAA
5555
is executed.
20
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS58C1001
Rev. 4.0 3/01
4
AUSTIN [ AUSTIN SEMICONDUCTOR ]
