A D V A N C E I N F O R M A T I O N
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . .4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Special Handling Instructions for FBGA Packages .................. 5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . .6
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ordering Information . . . . . . . . . . . . . . . . . . . . . . .7
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . .8
Table 1. Am29SL400D Device Bus Operations ................................8
Word/Byte Configuration .......................................................... 8
Requirements for Reading Array Data ..................................... 8
Writing Commands/Command Sequences .............................. 9
Program and Erase Operation Status ...................................... 9
Standby Mode .......................................................................... 9
Automatic Sleep Mode ............................................................. 9
RESET#: Hardware Reset Pin ................................................. 9
Output Disable Mode .............................................................. 10
Table 2. Am29SL400DT Top Boot Block Sector Address Table .....10
Table 3. Am29SL400DB Bottom Boot Block Sector Address Table 10
Autoselect Mode ..................................................................... 11
Table 4. Am29SL400D Autoselect Codes (High Voltage Method) ..11
Sector Protection/Unprotection ............................................... 11
Temporary Sector Unprotect .................................................. 11
Figure 1. In-system Sector Protection/Unprotection Algorithms ..... 12
Figure 2. Temporary Sector Unprotect Operation........................... 13
Hardware Data Protection ...................................................... 13
Reading Toggle Bits DQ6/DQ2 ............................................... 19
Figure 6. Toggle Bit Algorithm........................................................ 20
DQ5: Exceeded Timing Limits ................................................ 20
DQ3: Sector Erase Timer ....................................................... 20
Table 6. Write Operation Status ..................................................... 21
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 22
Figure 7. Maximum Negative Overshoot Waveform ...................... 22
Figure 8. Maximum Positive Overshoot Waveform........................ 22
Operating Ranges. . . . . . . . . . . . . . . . . . . . . . . . . 22
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 9. I
Current vs. Time (Showing Active and Automatic
CC1
Sleep Currents).............................................................................. 24
Figure 10. Typical I vs. Frequency ........................................... 24
CC1
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 11. Test Setup..................................................................... 25
Table 7. Test Specifications ........................................................... 25
Key to Switching Waveforms .................................................. 25
Figure 12. Input Waveforms and Measurement Levels ................. 25
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26
Read Operations .................................................................... 26
Figure 13. Read Operations Timings ............................................. 26
Figure 14. RESET# Timings .......................................................... 27
Word/Byte Configuration (BYTE#) ........................................ 28
Figure 15. BYTE# Timings for Read Operations............................ 28
Figure 16. BYTE# Timings for Write Operations............................ 28
Erase/Program Operations ..................................................... 29
Figure 17. Program Operation Timings.......................................... 30
Figure 18. Chip/Sector Erase Operation Timings .......................... 31
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . 32
Figure 19. Data# Polling Timings (During Embedded Algorithms). 32
Figure 20. Toggle Bit Timings (During Embedded Algorithms)...... 32
Figure 21. DQ2 vs. DQ6................................................................. 33
Temporary Sector Unprotect .................................................. 33
Figure 22. Temporary Sector Unprotect Timing Diagram .............. 33
Figure 23. Sector Protect/Unprotect Timing Diagram .................... 34
Alternate CE# Controlled Erase/Program Operations ............ 35
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 24. Alternate CE# Controlled Write Operation Timings ...... 36
Erase and Programming Performance . . . . . . . 37
Low V Write Inhibit .............................................................. 13
CC
Write Pulse “Glitch” Protection ............................................... 13
Logical Inhibit .......................................................................... 13
Power-Up Write Inhibit ............................................................ 13
Command Definitions . . . . . . . . . . . . . . . . . . . . . 13
Reading Array Data ................................................................ 13
Reset Command ..................................................................... 13
Autoselect Command Sequence ............................................ 14
Word/Byte Program Command Sequence ............................. 14
Unlock Bypass Command Sequence ..................................... 14
Figure 3. Program Operation .......................................................... 15
Chip Erase Command Sequence ........................................... 15
Sector Erase Command Sequence ........................................ 15
Figure 4. Erase Operation............................................................... 16
Table 5. Am29SL400D Command Definitions ................................17
Write Operation Status ........................................................... 18
DQ7: Data# Polling ................................................................. 18
Figure 5. Data# Polling Algorithm ................................................... 18
RY/BY#: Ready/Busy# ........................................................... 18
DQ6: Toggle Bit I .................................................................... 19
DQ2: Toggle Bit II ................................................................... 19
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 37
TSOP Pin and BGA Package Capacitance . . . . . 37
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 38
FBA048—48-Ball Fine-Pitch Ball Grid Array (FBGA) 6 x 8 mm
Package .................................................................................. 38
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 39
April 13, 2005 Rev. A Amend. +1
Am29SL400D
3
AMD [ AMD ]
