Revision 1.23 - January 28, 2009
PPC405EX – PowerPC 405EX Embedded Processor
Data Sheet
Table 2. DCR Address Map
Function
1
Start Address (Hex)
End Address (Hex)
0x3FF
Size
1KW (4KB)1
0x000
Total DCR Address Space
Reserved
000
00C
00E
010
012
014
016
020
030
040
060
080
090
0A0
0A8
0B0
0B3
0C0
0D0
0E0
0F0
100
140
180
200
00B
00D
00F
011
013
015
01F
02F
03F
05F
07F
08F
09F
0A7
0AF
0B2
0BF
0CF
0DF
0EF
0FF
13F
17F
1FF
3FF
CPR (Clocking, Power-on Reset)
System DCRs
DDR 1/2 SDRAM Controller
External Bus Controller (EBC)
External Bus Master (EBM)
Reserved
2W
2W
2W
2W
2W
PLB4XAHB Bridge
Reserved
16W
PCI Express 0
PCI Express 1
PLB4 Arbiter
32W
32W
16W
16W
8W
PLB-to-OPB Bridge
OPB-to-PLB Bridge
Reserved
Power Management
Reserved
3W
UIC 0
16W
16W
16W
UIC 1
UIC 2
Reserved
DMA
64W
Reserved
Ethernet MAL
Reserved
128W
Notes:
1. A DCR address is 10 bits (1024 or 1K unique addresses). Each unique address represents a single 32-bit (word) register, or one kiloword
(KW) (which equals 4KB).
8
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