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PPC405EX-SSD533T 参数 Datasheet PDF下载

PPC405EX-SSD533T图片预览
型号: PPC405EX-SSD533T
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 533MHz, CMOS, PBGA388, 27 X 27 MM, ROHS COMPLIANT, PLASTIC, MS-034C, EBGA-388]
分类和应用: 时钟外围集成电路
文件页数/大小: 76 页 / 1242 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.23 - January 28, 2009  
PPC405EX – PowerPC 405EX Embedded Processor  
Address Maps  
Data Sheet  
The PPC405EX incorporates two address maps. The first address map defines the possible use of addressable  
memory regions that the processor can access. The second address map defines Device Configuration Register  
(DCR) addresses (numbers). The DCRs are accessed by software running on the PPC405EX processor through  
the use of mtdcr and mfdcr instructions.  
Table 1. System Memory Address Map (4GB System Memory)  
Function  
Local Memory  
Subfunction  
DDR 1/2 SDRAM  
Start Address (Hex)  
0 0000 0000  
0 8000 0000  
0 9000 0000  
0 EF60 0000  
0 EF60 0200  
0 EF60 0208  
0 EF60 0300  
0 EF60 0308  
0 EF60 0400  
0 EF60 0420  
0 EF60 0500  
0 EF60 0520  
0 EF60 0600  
0 EF60 0606  
0 EF60 0700  
0 EF60 0740  
0 EF60 0800  
0 EF60 0880  
0 EF60 0900  
0 EF60 0A00  
0 EF60 0B00  
0 EF60 0C04  
0 EF61 0000  
0 EF62 0000  
0 EF62 0100  
0 EF6C 0000  
0 EF70 0000  
0 EF78 0000  
0 F000 0000  
0 FFE0 0000  
End Address (Hex)  
0 7FFF FFFF  
0 8FFF FFFF  
0 EF5F FFFF  
0 EF60 01FF  
0 EF60 0207  
0 EF60 02FF  
0 EF60 0307  
0 EF60 03FF  
0 EF60 041F  
0 EF60 04FF  
0 EF60 051F  
0 EF60 05FF  
0 EF60 0605  
0 EF60 06FF  
0 EF60 073F  
0 EF60 07FF  
0 EF60 087F  
0 EF60 08FF  
0 EF60 09FF  
0 EF60 0AFF  
0 EF60 0C03  
0 EF60 FFFF  
0 EF61 FFFF  
0 EF62 00FF  
0 EF6B FFFF  
0 EF6F FFFF  
0 EF77 FFFF  
0 EFFF FFFF  
0 FFDF FFFF  
0 FFFF FFFF  
Size  
2GB  
EBC  
256MB  
1.6GB  
512B  
8B  
PCI Express  
GPT  
UART 0  
Reserved  
UART 1  
248B  
8B  
Reserved  
IIC 0  
248B  
32B  
Reserved  
IIC 1  
224B  
32B  
Reserved  
SCP  
224B  
6B  
OPB Peripherals  
Reserved  
OPB Arbiter  
Reserved  
GPIO  
250B  
64B  
192B  
128B  
128B  
256B  
256B  
260B  
62KB  
64KB  
256B  
640KB  
256KB  
512KB  
8.9MB  
254MB  
2MB  
Reserved  
Ethernet 0  
Ethernet 1  
RGMII Bridge  
Reserved  
PKA +TRNG  
PCI Express Interrupt Handler  
Reserved  
USB OTG  
Security  
PLB/AHB Peripherals  
Reserved  
EBC Memory  
EBC Memory—Boot ROM  
EBC  
Notes:  
1. If peripheral bus boot is selected, peripheral bank 0 is automatically configured at reset to the address range listed above.  
2. After the boot process, software may reassign the boot memory regions for other uses.  
3. PCI Express can use PLB address range 0x1 0000 0000 to 0xF FFFF FFFF even though the CPU can not access it.  
AMCC Proprietary  
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