A24C04
AiT Semiconductor Inc.
www.ait-ic.com
MEMORY EEPROM
4k BITS (512 X 8) TWO-WIRE SERIAL
3. Device Addressing
The 4k EEPROM devices all require an 8-bit device address word following a start condition to enable the
chip for a read or write operation (see Figure 4 on page11).
The device address word consists of a mandatory "1", "0" sequence for the first four most significant bits as
shown. This is common to all the Serial EEPROM devices.
The 4k EEPROM only uses the A2 and A1 device address bits with the third bit being a memory page address
bit. The two device address bits must compare to their corresponding hardwired input pins. The A0 pin is no
connect.
The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit
is high and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a "0". If a compare is not made, the chip will
return to a standby state.
4. Write Operations
BYTE WRITE: A write operation requires an 8-bit data word address following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a "0" and then clock in
the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a "0" and the
addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. At this
time the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are
disabled during this write cycle and the EEPROM will not respond until the write is complete (see Figure 5 on
page11).
PAGE WRITE: The 4k EEPROM is capable of an 16-byte page write. A page write is initiated the same as a
byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. Instead,
after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to fifteen
(4k) data words. The EEPROM will respond with a "0" after each data word received. The microcontroller
must terminate the page write sequence with a stop condition (see Figure 6 on page11).
The data word address lower four (4k) bits is internally incremented following the receipt of each data word.
The higher data word address bits are not incremented, retaining the memory page row location. When the
word address, internally generated, reaches the page boundary, the following byte is placed at the beginning
of the same page. If more than sixteen (4k) data words are transmitted to the EEPROM, the data word
address will "roll over" and previous data will be overwritten.
REV2.0
- SEP 2008 RELEASED, NOV 2016 UPDATED -
- 8 -
AITSEMI [ AiT Semiconductor ]
