CHAPTER 2 OUTLINE (µPD78070AY)
2.1 Features
ROM-less version of the µPD78078Y Subseries
Type
Function
Program memory (ROM)
None
Internal high-speed RAM
Internal buffer RAM
1024 bytes
32 bytes
Data memory
(RAM)
External memory expansion space: 64 Kbytes
Minimum instruction execution time changeable from high speed (0.4 µs: @ 5.0-MHz operation with main
system clock) to ultra-low speed (122 µs: @ 32.768-kHz operation with subsystem clock)
Instruction set suited to system control
• Bit manipulation possible in all address spaces
• Multiply and divide instructions incorporated
I/O port pins: 61(including eight N-ch open-drain port pins)
8-bit resolution A/D converter: 8 channels
8-bit resolution D/A converter: 2 channels
Serial interface: 3 channels
• 3-wire serial I/O/2-wire serial I/O/I2C bus mode: 1 channel
• 3-wire serial I/O mode (automatic transmit/receive function): 1 channel
• 3-wire serial I/O/UART mode: 1 channel
Timer: 7 channels
• 16-bit timer/event counter : 1 channel
• 8-bit timer/event counter : 4 channels
• Watch timer
: 1 channel
: 1 channel
• Watchdog timer
Vectored interrupt source: 24
One test input
Two types of on-chip clock oscillation circuits (main system clock and subsystem clock)
Power supply voltage: VDD = 2.7 to 5.5 V
45
ETC [ ETC ]
