3.2.22 XT1, XT2 ................................................................................................................................ 65
3.2.23 VDD .......................................................................................................................................... 65
3.2.24 VSS .......................................................................................................................................... 65
3.2.25 IC ............................................................................................................................................ 65
Pin Input/Output Circuits and Recommended Connection of Unused Pins.............. 66
3.3
CHAPTER 4 PIN FUNCTION (µPD78070AY)...................................................................................... 71
4.1
4.2
Pin Function List................................................................................................................. 71
Description of Pin Functions ............................................................................................ 75
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
4.2.8
4.2.9
P00 to P07 (Port 0) ................................................................................................................ 75
P10 to P17 (Port 1) ................................................................................................................ 75
P20 to P27 (Port 2) ................................................................................................................ 76
P30 to P37 (Port 3) ................................................................................................................ 77
P60 to P63, P66 (Port 6) ....................................................................................................... 77
P70 to P72 (Port 7) ................................................................................................................ 78
P90 to P96 (Port 9) ................................................................................................................ 78
P100 to P103 (Port 10).......................................................................................................... 79
P120 to P127 (Port 12).......................................................................................................... 79
4.2.10 P130, P131 (Port 13) ............................................................................................................. 80
4.2.11 AD0 to AD7 ............................................................................................................................ 80
4.2.12 A0 to A15................................................................................................................................ 80
4.2.13 RD ........................................................................................................................................... 80
4.2.14 WR .......................................................................................................................................... 80
4.2.15 ASTB....................................................................................................................................... 80
4.2.16 AVREF0 ..................................................................................................................................... 80
4.2.17 AVREF1 ..................................................................................................................................... 80
4.2.18 AVDD ........................................................................................................................................ 80
4.2.19 AVSS ........................................................................................................................................ 81
4.2.20 RESET .................................................................................................................................... 81
4.2.21 X1, X2 ..................................................................................................................................... 81
4.2.22 XT1, XT2 ................................................................................................................................ 81
4.2.23 VDD .......................................................................................................................................... 81
4.2.24 VSS .......................................................................................................................................... 81
4.2.25 IC ............................................................................................................................................ 81
Pin Input/Output Circuits and Recommended Connection of Unused Pins.............. 82
4.3
CHAPTER 5 CPU ARCHITECTURE .................................................................................................... 87
5.1
Memory Spaces................................................................................................................... 87
5.1.1
5.1.2
5.1.3
5.1.4
External memory Space ........................................................................................................ 88
Internal data memory space .................................................................................................. 89
Special function register (SFR) area..................................................................................... 89
Data memory addressing....................................................................................................... 90
5.2
Processor Registers........................................................................................................... 91
5.2.1
5.2.2
5.2.3
Control registers ..................................................................................................................... 91
General registers.................................................................................................................... 94
Special function register (SFR) ............................................................................................. 95
16
ETC [ ETC ]
