voltage at the end of the diode conduction time (t
DIS
),
the output voltage (V
O
) information can be obtained. The
internal error amplifier for output voltage regulation
(EAV) compares the sampled voltage with an internal
precise reference to generate error voltage (V
COMV
),
which determines the duty cycle of the MOSFET (Q1) in
Constant Voltage Mode.
FL103 — Primary-Side-Regulation PWM Controller for LED Illumination
Frequency Hopping
EMI reduction is accomplished by frequency hopping,
which spreads the energy over a wider frequency range
than the bandwidth measured by the EMI test
equipment. FL103 has an internal frequency hopping
circuit that changes the switching frequency between
47kHz and 53kHz.
Constant Current Regulation
The output current (I
O
) can be estimated using the peak
drain current (I
PK
) and inductor current discharge time
(t
DIS
) since output current (I
O
) is same as the average of
the diode current (I
F_AVG
) in steady state. The output
current estimator (I
O
Estimator)
determines the peak
value of the drain current with a peak detection circuit
and calculates the output current (I
O
) using the inductor
discharge time (t
DIS
) and switching period (t
S
). This
output information is compared with an internal precise
reference to generate error voltage (V
COMI
), which
determines the duty cycle of the MOSFET (Q1) in
Constant Current Mode. With Fairchild’s innovative
technique TRUECURRENT™, constant current output
can be precisely controlled.
High-Voltage Startup
Figure 23 shows the startup block. The HV pin is
connected to the line input or DC link capacitor (C
DC
).
During startup, the internal startup circuit is enabled.
Meanwhile, line input supplies the current (I
Start
) to
charge the V
DD
capacitor (C
VDD
). When the V
DD
voltage
reaches V
DD-ON
(16V) and V
DC
is enough high to avoid
brownout, the internal startup circuit is disabled,
blocking I
Start
from flowing into the HV pin. Once the IC
turns on, C
VDD
is the only energy source to supply the IC
consumption current before the PWM starts to switch.
Thus, C
VDD
must be large enough to prevent V
DD-OFF
(7.5V) before the power can be delivered from the
auxiliary winding. To avoid the surge from input source,
the R
Start
is connected between C
DC
and HV, with a
recommended value of 100kΩ.
Voltage and Current Error Amplifier
Of the two error voltages, V
COMV
and V
COMI
, the small
one determines the duty cycle. Therefore, during
Constant Voltage Regulation Mode, V
COMV
determines
the duty cycle while V
COMI
is saturated to HIGH. During
Constant Current Regulation Mode, V
COMI
determines
the duty cycle while V
COMV
is saturated to HIGH.
Operating Current
The operating current is typically 3.2mA. The small
operating current results in higher efficiency and
reduces the V
DD
capacitor (C
VDD
) requirement. Once
FL103 enters Green Mode, the operating current is
reduced to 0.95mA, assisting the power supply in
meeting power conservation requirements.
Figure 23.
Startup Block
Protections
The FL103 has several self-protection functions; over-
voltage protection, thermal shutdown protection,
brownout protection, and pulse-by-pulse current limit.
V
DD
Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally at
16V and 7.5V, respectively. During startup, the V
DD
capacitor (C
VDD
) must be charged to 16V. The V
DD
capacitor (C
VDD
) continues to supply V
DD
until power can
be delivered from the auxiliary winding of the main
transformer. V
DD
is not allowed to drop below 7.5V
during this startup process. This UVLO hysteresis
window ensures that V
DD
capacitor (C
VDD
) properly
supplies V
DD
during startup.
V
DD
Over-Voltage Protection (OVP)
The OVP prevents damage from over-voltage
conditions. If the V
DD
voltage exceeds 28V at open-loop
feedback condition, the OVP is triggered and the PWM
switching is disabled. The OVP has a debounce time
(typically 200µs) to prevent false triggering due to
switching noises.
Thermal Shutdown Protection (TSD)
The built-in temperature-sensing circuit shuts down
PWM output if the junction temperature exceeds 140°C.
There is a hysteresis of 15°C.
Green Mode Operation
The FL103 uses voltage regulation error amplifier output
(V
COMV
) as an indicator of the output load and modulates
the PWM frequency, as shown in Figure 22. The
switching frequency decreases as load decreases. In
heavy load conditions, the switching frequency is fixed
at 50kHz. Once V
COMV
decreases below 2.5V, the PWM
frequency linearly decreases from 50kHz. When FL103
enters into green load, the PWM frequency is reduced
to a minimum frequency of 370Hz., gaining power
saving power to help meet international power
conservation requirements.
Figure 22.
Switching Frequency as Output Load
© 2011 Fairchild Semiconductor Corporation
FL103 • Rev. 1.0.0
www.fairchildsemi.com
11
ETC [ ETC ]
