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EPM3128ATC100-5 参数 Datasheet PDF下载

EPM3128ATC100-5图片预览
型号: EPM3128ATC100-5
PDF下载: 下载PDF文件 查看货源
内容描述: 电可擦除可编程逻辑器件复杂\n [Electrically-Erasable Complex PLD ]
分类和应用: 可编程逻辑器件输入元件LTE时钟
文件页数/大小: 53 页 / 781 K
品牌: ETC [ ETC ]
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MAX 3000A Programmable Logic Device Family Data Sheet
Figure 6. I/O Control Block of MAX 3000A Devices
6 Global
Output Enable Signals
PIA
OE Select Multiplexer
VCC
to Other I/O Pins
from
Macrocell
GND
Open-Drain Output
Slew-Rate Control
to PIA
When the tri-state buffer control is connected to ground, the output is
tri-stated (high impedance) and the I/O pin can be used as a dedicated
input. When the tri-state buffer control is connected to V
CC
, the output is
enabled.
The MAX 3000A architecture provides dual I/O feedback, in which
macrocell and pin feedbacks are independent. When an I/O pin is
configured as an input, the associated macrocell can be used for buried
logic.
Altera Corporation
11