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VS1002D 参数 Datasheet PDF下载

VS1002D图片预览
型号: VS1002D
PDF下载: 下载PDF文件 查看货源
内容描述: MP3音频编解码器 [MP3 AUDIO CODEC]
分类和应用: 解码器编解码器
文件页数/大小: 54 页 / 517 K
品牌: ETC [ ETC ]
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VS1002d
VS1002
D
VS1002d - MP3 AUDIO CODEC
Features
Decodes MPEG 1.0 & 2.0 audio layer III (CBR
+ VBR); WAV and PCM files
Encodes ADPCM from microphone input
Streaming support for MP3 and WAV
Bass control
Operates with single a clock 12..13 MHz or
24..26 MHz.
Internal clock doubler
Low-power operation
High-quality on-chip stereo DAC with no
phase error between channels
Stereo earphone driver capable of driving a
30Ω load
Separate 2.5 V..3.6 V operating voltages for
analog and digital
7.5 KiB On-chip RAM for user code / data
Serial control and data interfaces
Can be used as a slave co-processor
SPI flash boot for special applications
UART for debugging purposes
New functions may be added with software
and 4 GPIO pins
Lead-free RoHS-compliant packages
Description
VS1002d is a single-chip MP3 audio decoder. It
contains a high-performance, low-power DSP pro-
cessor core VS DSP
4
, working data memory, 5
KiB instruction RAM and 2.5 KiB data RAM for
user applications, serial control and input data in-
terfaces, 4 general purpose I/O pins, an UART, as
well as a high-quality variable-sample-rate mono
ADC and stereo DAC, followed by an earphone
amplifier and a ground buffer.
VS1002d receives its input bitstream through a
serial input bus, which it listens to as a system
slave. The input stream is decoded and passed
through a digital volume control to an 18-bit over-
sampling, multi-bit, sigma-delta DAC. The decod-
ing is controlled via a serial control bus. In addi-
tion to the basic decoding, it is possible to add
application specific features, like DSP effects, to
the user RAM memory.
audio
VS1002
MIC AMP
4
GPIO
Mono
ADC
Stereo
DAC
Stereo Ear−
phone Driver
audio
L
R
output
GPIO
X ROM
DREQ
SO
SI
SCLK
XCS
XDCS
Serial
Data/
Control
Interface
X RAM
VSDSP
4
Y ROM
RX
TX
UART
Y RAM
Instruction
RAM
Instruction
ROM
Version 1.0,
2005-04-27
1