ADM7008
Function Description
by comparing the contents of register 04h and 05h and then selecting the technology
whose bit is set in both registers of highest priority relative to the following list.
1. 100Base-TX full duplex (highest priority)
2. 100Base-TX half duplex
3. 10Base-T full duplex
4. 10Base-T half duplex (lowest priority)
The basic mode control register at address 0h provides control of enabling, disabling, and
restarting of the auto negotiation function. When auto negotiation is disabled, the speed
selection bit (bit 13) controls switching between 10 Mbps or 100 Mbps operation, while
the duplex mode bit (bit 8) controls switching between full duplex operation and half
duplex operation. The speed selection and duplex mode bits have no effect on the mode
of operation when the auto negotiation enable bit (bit 12) is set.
The basic mode status register at address 1h indicates the set of available abilities for
technology types (bit 15 to bit 11), auto negotiation ability (bit 3), and extended register
capability (bit 0). These bits are hardwired to indicate the full functionality of the
ADM7008. The BMSR also provides status on :
1.Whether auto negotiation is complete (bit 5)
2.Whether the Link Partner is advertising that a remote fault has occurred (bit 4)
3.Whether a valid link has been established (bit 2)
The auto negotiation advertisement register at address 4h indicates the auto negotiation
abilities to be advertised by the ADM7008. All available abilities are transmitted by
default, but writing to this register or configuring external pins can suppress any ability.
The auto negotiation link partner ability register at address 05h indicates the abilities of
the Link Partner as indicated by auto negotiation communication. The contents of this
register are considered valid when the auto negotiation complete bits (bit 5, register
address 1h and bit 4, register 17h) is set.
3.1.19 Auto Negotiation and Speed Configuration
The twelve sets of four pins listed in Table 3-2 configure the speed capability of each
channel of ADM7008. The logic state of these pins is latched into the advertisement
register (register address 4h) for auto negotiation purpose. These pins are also used for
evaluating the default value in the base mode control register (register 0h) according to
Table 3-2.
3.2 MAC Interface
The ADM7008 interfaces to eight 10/100 Media Access Controllers (MAC) via the RMII,
SMII, or Source Synchronous MII (SS_SMII) Interface. All ports on the device operate
in the same interface mode that is selected.
ADMtek Inc.
3-13
ETC [ ETC ]
