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ST72254G1B1 参数 Datasheet PDF下载

ST72254G1B1图片预览
型号: ST72254G1B1
PDF下载: 下载PDF文件 查看货源
内容描述: 与单电压闪存的8位MCU 。 ADC。 16位定时器。 SPI 。\n [8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY. ADC. 16-BIT TIMERS. SPI. ]
分类和应用: 闪存
文件页数/大小: 140 页 / 1350 K
品牌: ETC [ ETC ]
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ST72104G, ST72215G, ST72216G, ST72254G  
7.1 LOW VOLTAGE DETECTOR (LVD)  
To allow the integration of power management  
features in the application, the Low Voltage Detec-  
tor function (LVD) generates a static reset when  
In these conditions, secure operation is always en-  
sured for the application without the need for ex-  
ternal reset hardware.  
the V  
supply voltage is below a V reference  
DD  
IT-  
During a Low Voltage Detector Reset, the RESET  
pin is held low, thus permitting the MCU to reset  
other devices.  
value. This means that it secures the power-up as  
well as the power-down keeping the ST7 in reset.  
The V reference value for a voltage drop is lower  
IT-  
Notes:  
than the V reference value for power-on in order  
1. The LVD allows the device to be used without  
any external RESET circuitry.  
IT+  
to avoid a parasitic reset when the MCU starts run-  
ning and sinks current on the supply (hysteresis).  
2. Three different reference levels are selectable  
through the option byte according to the applica-  
tion requirement.  
The LVD Reset circuitry generates a reset when  
V
is below:  
DD  
LVD application note  
– V when V is rising  
IT+  
DD  
– V when V is falling  
The LVD function is illustrated in the Figure 9.  
Application software can detect a reset caused by  
the LVD by reading the LVDRF bit in the CRSR  
register.  
IT-  
DD  
Provided the minimum V value (guaranteed for  
DD  
This bit is set by hardware when a LVD reset is  
generated and cleared by software (writing zero).  
the oscillator frequency) is above V , the MCU  
IT-  
can only be in two modes:  
– under full software control  
– in static safe reset  
Figure 9. Low Voltage Detector vs Reset  
V
DD  
V
hyst  
V
V
IT+  
IT-  
RESET  
18/140  
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