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ST72254G1B1 参数 Datasheet PDF下载

ST72254G1B1图片预览
型号: ST72254G1B1
PDF下载: 下载PDF文件 查看货源
内容描述: 与单电压闪存的8位MCU 。 ADC。 16位定时器。 SPI 。\n [8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY. ADC. 16-BIT TIMERS. SPI. ]
分类和应用: 闪存
文件页数/大小: 140 页 / 1350 K
品牌: ETC [ ETC ]
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ST72104G, ST72215G, ST72216G, ST72254G  
4 FLASH PROGRAM MEMORY  
4.1 INTRODUCTION  
This mode needs five signals (plus the V signal  
if necessary) to be connected to the programming  
tool. This signals are:  
DD  
FLASH devices have a single voltage non-volatile  
FLASH memory that may be programmed in-situ  
(or plugged in a programming tool) on a byte-by-  
byte basis.  
– RESET: device reset  
– V : device ground power supply  
SS  
– ISPCLK: ISP output serial clock pin  
– ISPDATA: ISP input serial data pin  
4.2 MAIN FEATURES  
– ISPSEL: Remote ISP mode selection. This pin  
must be connected to V on the application  
Remote In-Situ Programming (ISP) mode  
Up to 16 bytes programmed in the same cycle  
MTP memory (Multiple Time Programmable)  
Read-out memory protection against piracy  
SS  
board through a pull-down resistor.  
If any of these pins are used for other purposes on  
the application, a serial resistor has to be imple-  
mented to avoid a conflict if the other device forces  
the signal level.  
4.3 STRUCTURAL ORGANISATION  
Figure 5 shows a typical hardware interface to a  
standard ST7 programming tool. For more details  
on the pin locations, refer to the device pinout de-  
scription.  
The FLASH program memory is organised in a  
single 8-bit wide memory block which can be used  
for storing both code and data constants.  
Figure 5. Typical Remote ISP Interface  
The FLASH program memory is mapped in the up-  
per part of the ST7 addressing space and includes  
the reset and interrupt user vector area .  
HE10 CONNECTOR TYPE  
TO PROGRAMMING TOOL  
XTAL  
4.4 IN-SITU PROGRAMMING (ISP) MODE  
1
C
C
L1  
L0  
The FLASH program memory can be programmed  
using Remote ISP mode. This ISP mode allows  
the contents of the ST7 program memory to be up-  
dated using a standard ST7 programming tools af-  
ter the device is mounted on the application board.  
This feature can be implemented with a minimum  
number of added components and board area im-  
pact.  
ISPSEL  
10KΩ  
V
SS  
RESET  
ISPCLK  
An example Remote ISP hardware interface to the  
standard ST7 programming tool is described be-  
low. For more details on ISP programming, refer to  
the ST7 Programming Specification.  
ST7  
ISPDATA  
47KΩ  
Remote ISP Overview  
The Remote ISP mode is initiated by a specific se-  
quence on the dedicated ISPSEL pin.  
APPLICATION  
The Remote ISP is performed in three steps:  
– Selection of the RAM execution mode  
– Download of Remote ISP code in RAM  
4.5 MEMORY READ-OUT PROTECTION  
The read-out protection is enabled through an op-  
tion bit.  
– Execution of Remote ISP code in RAM to pro-  
gram the user program into the FLASH  
For FLASH devices, when this option is selected,  
the program and data stored in the FLASH memo-  
ry are protected against read-out piracy (including  
a re-write protection). When this protection option  
is removed the entire FLASH program memory is  
first automatically erased. However, the E PROM  
data memory (when available) can be protected  
only with ROM devices.  
Remote ISP hardware configuration  
In Remote ISP mode, the ST7 has to be supplied  
2
with power (V  
cillator and application crystal circuit for example).  
and V ) and a clock signal (os-  
DD  
SS  
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