PIC16F87X
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the FOSC/(16(X + 1)) equation can reduce the
baud rate error in some cases.
10.1
USART Baud Rate Generator (BRG)
The BRG supports both the asynchronous and syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In asynchronous
mode, bit BRGH (TXSTA<2>) also controls the baud
rate. In synchronous mode, bit BRGH is ignored.
Table 10-1 shows the formula for computation of the
baud rate for different USART modes which only apply
in master mode (internal clock).
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before output-
ting the new baud rate.
10.1.1 SAMPLING
The data on the RC7/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
Given the desired baud rate and Fosc, the nearest inte-
ger value for the SPBRG register can be calculated
using the formula in Table 10-1. From this, the error in
baud rate can be determined.
TABLE 10-1: BAUD RATE FORMULA
SYNC
BRGH = 0 (Low Speed)
BRGH = 1 (High Speed)
0
1
(Asynchronous) Baud Rate = FOSC/(64(X+1))
(Synchronous) Baud Rate = FOSC/(4(X+1))
Baud Rate= FOSC/(16(X+1))
NA
X = value in SPBRG (0 to 255)
TABLE 10-2: REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Value on: Value on all
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1 Bit 0
POR,
BOR
other
resets
0000 -010 0000 -010
0000 000x 0000 000x
0000 0000 0000 0000
98h
18h
99h
TXSTA
CSRC TX9 TXEN SYNC
—
BRGH TRMT TX9D
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D
SPBRG Baud Rate Generator Register
Legend: x = unknown, -= unimplemented read as '0'. Shaded cells are not used by the BRG.
1999 Microchip Technology Inc.
DS30292B-page 97
ETC [ ETC ]
