PIC16F87X
FIGURE 2-4: PIC16F874/873 REGISTER FILE MAP
File
Address
Indirect addr.(*)
Indirect addr.(*)
OPTION_REG
PCL
Indirect addr.(*)
TMR0
Indirect addr.(*)
OPTION_REG 81h
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
110h
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
190h
80h
TMR0
PCL
PCL
PCL
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
STATUS
FSR
STATUS
FSR
STATUS
STATUS
FSR
FSR
PORTA
PORTB
PORTC
PORTD (1)
PORTE (1)
PCLATH
INTCON
PIR1
TRISA
TRISB
TRISC
TRISD (1)
TRISE (1)
TRISB
PORTB
PCLATH
INTCON
PCLATH
INTCON
EECON1
EECON2
Reserved(2)
Reserved(2)
PCLATH
INTCON
PIE1
EEDATA
EEADR
PIR2
PIE2
TMR1L
TMR1H
T1CON
TMR2
PCON
EEDATH
EEADRH
SSPCON2
PR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
SSPADD
SSPSTAT
RCSTA
TXREG
TXSTA
SPBRG
RCREG
CCPR2L
CCPR2H
CCP2CON
ADRESH
ADCON0
ADRESL
ADCON1
1A0h
120h
A0h
General
Purpose
Register
General
Purpose
Register
accesses
20h-7Fh
accesses
A0h - FFh
1EFh
1F0h
96 Bytes
96 Bytes
16Fh
170h
17Fh
1FFh
7Fh
FFh
Bank 3
Bank 1
Bank 2
Bank 0
Unimplemented data memory locations, read as ’0’.
* Not a physical register.
Note 1: These registers are not implemented on 28-pin devices.
2: These registers are reserved, maintain these registers clear.
DS30292B-page 14
1999 Microchip Technology Inc.
ETC [ ETC ]
