PIC16F87X
TABLE 12-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
Wake-up via WDT or
Interrupt
PCON
873 874 876 877
873 874 876 877
873 874 876 877
873 874 876 877
873 874 876 877
873 874 876 877
873 874 876 877
873 874 876 877
873 874 876 877
873 874 876 877
873 874 876 877
873 874 876 877
873 874 876 877
873 874 876 877
---- --qq
1111 1111
0000 0000
--00 0000
0000 -010
0000 0000
xxxx xxxx
0--- 0000
0--- 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
x--- x000
---- ----
---- --uu
1111 1111
0000 0000
--00 0000
0000 -010
0000 0000
uuuu uuuu
0--- 0000
0--- 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
u--- u000
---- ----
---- --uu
1111 1111
uuuu uuuu
--uu uuuu
uuuu -uuu
uuuu uuuu
uuuu uuuu
u--- uuuu
u--- uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
u--- uuuu
---- ----
PR2
SSPADD
SSPSTAT
TXSTA
SPBRG
ADRESL
ADCON1
EEDATA
EEADR
EEDATH
EEADRH
EECON1
EECON2
Legend: u = unchanged, x = unknown, -= unimplemented bit, read as ’0’, q= value depends on condition,
r= reserved maintain clear.
Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
3: See Table 12-5 for reset value for specific condition.
FIGURE 12-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD)
VDD
MCLR
INTERNAL POR
TPWRT
PWRT TIME-OUT
TOST
OST TIME-OUT
INTERNAL RESET
1999 Microchip Technology Inc.
DS30292B-page 129