PIC16F87X
3.5
PORTE and TRISE Register
FIGURE 3-8: PORTE BLOCK DIAGRAM (IN
I/O PORT MODE)
This section is not applicable to the PIC16F873 or
PIC16F876.
Data
Bus
D
Q
PORTE has three pins, RE0/RD/AN5, RE1/WR/AN6
and RE2/CS/AN7, which are individually configurable
as inputs or outputs. These pins have Schmitt Trigger
input buffers.
WR
PORT
I/O pin(1)
CK
Data Latch
D
Q
I/O PORTE becomes control inputs for the micropro-
cessor port when bit PSPMODE (TRISE<4>) is set. In
this mode, the user must make sure that the
TRISE<2:0> bits are set (pins are configured as digital
inputs). Ensure ADCON1 is configured for digital I/O. In
this mode, the input buffers are TTL.
WR
TRIS
Schmitt
Trigger
input
CK
TRIS Latch
buffer
RD TRIS
Register 3-1 shows the TRISE register, which also con-
trols the parallel slave port operation.
Q
D
PORTE pins are multiplexed with analog inputs. When
selected as an analog input, these pins will read as ’0’s.
EN
EN
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
RD PORT
Note 1: I/O pins have protection diodes to VDD and VSS.
Note: On a Power-on Reset, these pins are con-
figured as analog inputs.
REGISTER 3-1: TRISE REGISTER (ADDRESS 89h)
R-0
IBF
bit7
R-0
R/W-0
IBOV
R/W-0
U-0
R/W-1
R/W-1
R/W-1
bit0
OBF
PSPMODE
—
bit2
bit1
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
bit0
- n= Value at POR reset
Parallel Slave Port Status/Control Bits
bit 7 :
IBF: Input Buffer Full Status bit
1= A word has been received and is waiting to be read by the CPU
0= No word has been received
bit 6:
bit 5:
bit 4:
OBF: Output Buffer Full Status bit
1= The output buffer still holds a previously written word
0= The output buffer has been read
IBOV: Input Buffer Overflow Detect bit (in microprocessor mode)
1= A write occurred when a previously input word has not been read (must be cleared in software)
0= No overflow occurred
PSPMODE: Parallel Slave Port Mode Select bit
1= Parallel slave port mode
0= General purpose I/O mode
bit 3:
bit 2:
Unimplemented: Read as ’0’
PORTE Data Direction Bits
Bit2: Direction Control bit for pin RE2/CS/AN7
1= Input
0= Output
bit 1:
bit 0:
Bit1: Direction Control bit for pin RE1/WR/AN6
1= Input
0= Output
Bit0: Direction Control bit for pin RE0/RD/AN5
1= Input
0= Output
DS30292B-page 36
1999 Microchip Technology Inc.
ETC [ ETC ]
