KT0803K
Register Bank
The register bank stores channel frequency codes, calibration parameters, operation status, mode and power
controls, which can be accessed by the internal digital controller, state machines and external micro
controllers through the serial interface.
All registers are 8 bits wide. Control logics are active high unless specifically noted.
Register
0x00
0x01
0x02
0x04
0x0B
0x0E
0x0F
0x10
0x12
0x13
0x14
0x16
7
6
5
-
4
3
2
1
0
CHSEL[8:1]
RFGAIN[1:0]
CHSEL[0]
PGA[2:0]
-
CHSEL[11:9]
-
RFGAIN[3]
MONO
MUTE
PLTADJ
PHTCNST
PGA_LSB[1:0]
PDPA
-
-
FDEV[1:0]
BASS[1:0]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
SLNCID
-
PA_BIAS
PW_OK
-
-
-
LMTLVL[1:0]
PGAMOD
SW_MOD
SLNCDIS
RFGAIN[2]
SLNCTHL[2:0]
-
SLNCTHH[2:0]
PA_CTRL
-
-
-
-
-
-
-
SLNCTIME[2:0]
-
SLNCCNTHIGH[2:0]
-
-
SLNCCNTLOW[2:0]
Note 1: ONLY read/write the defined registers.
Note 2: Shaded registers are used in KT0803.
Register 0x00 (Address: 0x00, Default value: 0x81)
Bit
7
6
5
4
3
2
1
0
KT0803K
KT0803
CHSEL[8:1]
CHSEL[7:0]
As the minimum frequency step is changed from 100KHz in KT0803 to 50KHz in KT0803K. The 12 bits
(Reg0x1[2:0]; Reg0x0[7:0]; Reg0x2[7]) are required to select the FM transmission channel instead of 11
bits in KT0803. If a 100 KHz step is wanted, set Reg0x2[7] to 0 and thus no software change is needed
from KT0803 to KT0803K to set the same FM frequency.
Register 0x01 (Address: 0x01, Default value: 0xC3)
Bit
7
6
5
4
3
2
1
0
KT0803K
KT0803
RFGAIN[1:0]
RFGAIN[1:0]
PGA[2:0]
PGA[2:0]
CHSEL[11:9]
CHSEL[10:8]
Bits
7:6
Type
RW
Default
11
Label
RFGAIN[1:0]
Description
Transmission Range Adjustment with RFGAIN[3] in Reg
0x02[6] and RFGAIN[2] in Reg 0x13[7] (See Table 4
below)
PGA[2:0]
5:3
RW
000
PGA Gain Control (see PGA_LSB description, Reg 0x04)
111: 12dB
110: 8dB
101: 4dB
100: 0dB
000: 0dB
001: -4dB
010: -8dB
011: -12dB
CHSEL[11:9]
2:0
RW
011
FM Channel Selection[11:9]
DS-1896P-03 070604
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