HT48R50A-1/HT48C50-1
Pad Description
Pad Name
I/O
Options
Pull-high*
Wake-up
CMOS/Schmitt
trigger Input
Description
Bidirectional 8-bit input/output port. Each bit can be configured as a
wake-up input by options. Software instructions determine the CMOS out-
put or Schmitt trigger or CMOS input with pull-high resistor (determined by
pull-high options).
Bidirectional 8-bit input/output port. Software instructions determine the
CMOS output or Schmitt trigger input with pull-high resistor (determined by
pull-high options).
The PB0 and PB1 are pin-shared with the BZ and BZ, respectively. Once
the PB0 and PB1 are selected as buzzer driving outputs, the output signals
come from an internal PFD generator (shared with Timer/Event Counter 0).
Bidirectional I/O lines. Software instructions determine the CMOS output
or Schmitt trigger input with pull-high resistor (determined by pull-high op-
tions).
Negative power supply, ground
Bidirectional I/O lines. Software instructions determine the CMOS output
or Schmitt trigger input with pull-high resistor (determined by pull-high op-
tions). This external interrupt input is pin-shared with PG0. The external in-
terrupt input is activated on a high to low transition.
Timer/Event Counter 0 Schmitt trigger input (without pull-high resistor)
Bidirectional I/O lines. Software instructions determine the CMOS output
or Schmitt trigger input with pull-high resistor (determined by pull-high op-
tions).
Timer/Event Counter 1 Schmitt trigger input (without pull-high resistor)
Schmitt trigger reset input. Active low
Positive power supply
OSC1, OSC2 are connected to an RC network or Crystal (determined by
options) for the internal system clock. In the case of RC operation, OSC2 is
the output terminal for 1/4 system clock. These two pins can also be
optioned as an RTC oscillator (32768Hz) or I/O lines. In these two cases,
the system clock comes from an internal RC oscillator whose frequency
has 4 options (3.2MHz, 1.6MHz, 800kHz, 400kHz). If the I/O option is se-
lected, the pull-high options can also be enabled or disabled. Otherwise
the PG1 and PG2 are used as internal registers (pull-high resistors are al-
ways disabled).
PA0~PA7
I/O
PB0/BZ
PB1/BZ
PB2~PB7
I/O
Pull-high*
I/O or BZ/BZ
PD0~PD7
VSS
I/O
¾
I/O
Pull-high*
¾
Pull-high*
¾
Pull-high*
¾
¾
¾
PG0/INT
TMR0
PC0~PC7
TMR1
RES
VDD
I
I/O
I
I
¾
Pull-high*
OSC1/PG1
OSC2/PG2
I
O
Crystal
or RC
or Int. RC+I/O
or Int. RC+RTC
Note: * The pull-high resistors of each I/O port (PA, PB, PC, PD, PG) are controlled by options.
Absolute Maximum Ratings
Supply Voltage ...........................V
SS
-0.3V
to V
SS
+6.0V
Input Voltage..............................V
SS
-0.3V
to V
DD
+0.3V
Storage Temperature ............................-50°C to 125°C
Operating Temperature...........................-40°C to 85°C
Note: These are stress ratings only. Stresses exceeding the range specified under
²Absolute
Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
Rev. 1.00
4
January 2, 2003
ETC [ ETC ]
