CAT28C512/513
Page Write
The page write mode of the CAT28C512/513 (essen-
tially an extended BYTE WRITE mode) allows from 1 to
128 bytes of data to be programmed within a single
E
2
PROM write cycle. This effectively reduces the byte-
write time by a factor of 128.
Following an initial WRITE operation (WE pulsed low, for
t
WP
, and then high) the page write mode can begin by
issuing sequential
WE
pulses, which load the address
and data bytes into a 128 byte temporary buffer. The
page address where data is to be written, specified by
bits A
7
to A
15
, is latched on the last falling edge of
WE.
Each byte within the page is defined by address bits A
0
CE
Figure 5. Byte Write Cycle [CE Controlled]
ADDRESS
tAS
tAH
tCW
CE
to A
6
(which can be loaded in any order) during the first
and subsequent write cycles. Each successive byte load
cycle must begin within t
BLC MAX
of the rising edge of the
preceding
WE
pulse. There is no page write window
limitation as long as
WE
is pulsed low within t
BLC MAX
.
Upon completion of the page write sequence,
WE
must
stay high a minimum of t
BLC MAX
for the internal auto-
matic program cycle to commence. This programming
cycle consists of an erase cycle, which erases any data
that existed in each addressed cell, and a write cycle,
which writes new data back into the cell. A page write will
only write data to the locations that were addressed and
will not rewrite the entire page.
tWC
tBLC
tOEH
OE
tCS
WE
HIGH-Z
DATA OUT
tOES
tCH
DATA IN
DATA VALID
tDS
tDH
5096 FHD F07
Figure 6. Page Mode Write Cycle
OE
CE
t WP
WE
t BLC
ADDRESS
t WC
I/O
BYTE 0
BYTE 1
BYTE 2
BYTE n
BYTE n+1
LAST BYTE
BYTE n+2
5096 FHD F10
7
Doc. No. 1007, Rev . A
ETC [ ETC ]
