RTL8201N
Datasheet
Table of Contents
1. GENERAL DESCRIPTION................................................................................................................................................1
2. FEATURES...........................................................................................................................................................................2
3. APPLICATIONS..................................................................................................................................................................2
4. BLOCK DIAGRAM.............................................................................................................................................................3
5. PIN ASSIGNMENTS ...........................................................................................................................................................4
5.1.
GREEN PACKAGE AND VERSION IDENTIFICATION.........................................................................................................4
6. PIN DESCRIPTIONS ..........................................................................................................................................................5
6.1.
6.2.
6.3.
6.4.
6.5.
6.6.
6.7.
6.8.
6.9.
MII INTERFACE ............................................................................................................................................................5
RMII INTERFACE .........................................................................................................................................................6
SNI (SERIAL NETWORK INTERFACE) 10MBPS ONLY ....................................................................................................6
CLOCK INTERFACE .......................................................................................................................................................7
10MBPS/100MBPS NETWORK INTERFACE....................................................................................................................7
DEVICE CONFIGURATION INTERFACE ...........................................................................................................................8
LED INTERFACE...........................................................................................................................................................8
POWER PINS.................................................................................................................................................................9
RESET AND OTHER PINS...............................................................................................................................................9
7. REGISTER DESCRIPTIONS ..........................................................................................................................................10
7.1.
7.2.
7.3.
7.4.
7.5.
7.6.
7.7.
7.8.
7.9.
7.10.
7.11.
7.12.
REGISTER 0 BASIC MODE CONTROL REGISTER..........................................................................................................10
REGISTER 1 BASIC MODE STATUS REGISTER .............................................................................................................11
REGISTER 2 PHY IDENTIFIER REGISTER 1..................................................................................................................12
REGISTER 3 PHY IDENTIFIER REGISTER 2..................................................................................................................12
REGISTER 4 AUTO-NEGOTIATION ADVERTISEMENT REGISTER (ANAR) ....................................................................12
REGISTER 5 AUTO-NEGOTIATION LINK PARTNER ABILITY REGISTER (ANLPAR)......................................................13
REGISTER 6 AUTO-NEGOTIATION EXPANSION REGISTER (ANER) .............................................................................14
REGISTER 16 NWAY SETUP REGISTER (NSR).............................................................................................................14
REGISTER 17 LOOPBACK, BYPASS, RECEIVER ERROR MASK REGISTER (LBREMR).................................................14
REGISTER 18 RX_ER COUNTER (REC) .....................................................................................................................15
REGISTER 19 SNR DISPLAY REGISTER.......................................................................................................................15
REGISTER 25 TEST REGISTER.....................................................................................................................................15
8. FUNCTIONAL DESCRIPTION.......................................................................................................................................16
8.1.
8.1.1.
8.1.2.
8.2.
8.2.1.
8.2.2.
8.2.3.
8.2.4.
MII AND MANAGEMENT INTERFACE ..........................................................................................................................16
Data Transition.....................................................................................................................................................16
Serial Management...............................................................................................................................................17
AUTO-NEGOTIATION AND PARALLEL DETECTION ......................................................................................................18
Setting the Medium Type and Interface Mode to MAC.........................................................................................18
UTP Mode and MII Interface ...............................................................................................................................19
UTP Mode and SNI Interface ...............................................................................................................................19
Fiber Mode and MII Interface..............................................................................................................................19
FLOW CONTROL SUPPORT ..........................................................................................................................................20
HARDWARE CONFIGURATION AND AUTO-NEGOTIATION ............................................................................................20
SERIAL NETWORK INTERFACE....................................................................................................................................21
POWER DOWN, LINK DOWN, POWER SAVING, AND ISOLATION MODES ......................................................................21
MEDIA INTERFACE .....................................................................................................................................................22
100Base-TX Transmit & Receive Operation ........................................................................................................22
100Base-FX Fiber Transmit & Receive Operation ..............................................................................................22
10Base-T Transmit & Receive Operation.............................................................................................................23
REPEATER MODE OPERATION.....................................................................................................................................23
8.3.
8.4.
8.5.
8.6.
8.7.
8.7.1.
8.7.2.
8.7.3.
8.8.
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
With Auto MDIX
iii
Rev. 1.2