R
×
5VL
BLOCK DIAGRAMS
•
Nch Open Drain Output (R
×
×
5VL
×
A)
•
CMOS Output (R
×
×
5VL
×
C)
V
DD
2
OUT
1
+
–
Vref
3
GND
V
DD
2
+
–
Vref
OUT
1
3
GND
TIME CHART
Supply Voltage
(V
DD
)
Released Voltage
Detected Voltage
+V
DET
–V
DET
Detector Threshold Hysteresis
Minimum Operating Voltage
GND
Output Voltage
(OUT)
GND
t
PLH
DEFINITION OF OUTPUT DELAY TIME t
PLH
+V
DET
+ 2.0V
Input Voltage
(V
DD
)
1.2V
GND
7.0V
Output Voltage
3.5V
Output Voltage
+V
DET
+ 2.0V
2
GND
t
PHL
t
PLH
t
PHL
t
PLH
Input Voltage
(V
DD
)
1.2V
GND
+V
DET
+2.0V
+V
DET
+ 2.0V
GND
Nch Open Drain Output
CMOS Output
2