OB2263
Current Mode PWM ControllerFrequency Shuffling
OPERATION DESCRIPTION
The OB2263 is a highly integrated PWM controller
IC optimized for offline flyback converter
applications in sub 30W power range. The extended
burst mode control greatly reduces the standby
power consumption and helps the design easily
meet the international power conservation
requirements.
minimize the switching loss and reduces the
standby power consumption to the greatest extend.
The frequency control also eliminates the audio
noise at any loading conditions.
•
Oscillator Operation
A resistor connected between RI and GND sets the
constant current source to charge/discharge the
internal cap and thus the PWM oscillator frequency
is determined. The relationship between RI and
switching frequency follows the below equation
within the specified RI in Kohm range at nominal
loading operational condition.
•
Startup Current and Start up Control
Startup current of OB2263 is designed to be very
low so that VDD could be charged up above UVLO
threshold level and device starts up quickly. A large
value startup resistor can therefore be used to
minimize the power loss yet provides reliable
startup in application. For AC/DC adaptor with
universal input range design, a 2 MΩ, 1/8 W
startup resistor could be used together with a VDD
capacitor to provide a fast startup and low power
dissipation solution.
6500
FOSC
=
(Khz)
RI(Kohm)
•
Current Sensing and Leading Edge Blanking
Cycle-by-Cycle current limiting is offered in
OB2263 current mode PWM control. The switch
current is detected by a sense resistor into the sense
pin. An internal leading edge blanking circuit chops
off the sense voltage spike at initial MOSFET on
state due to Snubber diode reverse recovery so that
the external RC filtering on sense input is no longer
required. The current limit comparator is disabled
and thus cannot turn off the external MOSFET
during the blanking period. PWM duty cycle is
determined by the current sense input voltage and
the FB input voltage.
•
Operating Current
The Operating current of OB2263 is low at 1.4mA.
Good efficiency is achieved with OB2263 low
operating current together with extended burst
mode control features.
•
Frequency shuffling for EMI improvement
The frequency Shuffling/jittering (switching
frequency modulation) is implemented in OB2263.
The oscillation frequency is modulated with a
random source so that the tone energy is spread out.
The spread spectrum minimizes the conduction
band EMI and therefore reduces system design
challenge.
•
Internal Synchronized Slope Compensation
Built-in slope compensation circuit adds voltage
ramp onto the current sense input voltage for PWM
generation. This greatly improves the close loop
stability at CCM and prevents the sub-harmonic
oscillation and thus reduces the output ripple
voltage.
•
Extended Burst Mode Operation
At zero load or light load condition, majority of the
power dissipation in a switching mode power
supply is from switching loss on the MOSFET
transistor, the core loss of the transformer and the
loss on the snubber circuit. The magnitude of
power loss is in proportion to the number of
switching events within a fixed period of time.
Reducing switching events leads to the reduction
on the power loss and thus conserves the energy.
OB2263 self adjusts the switching mode according
to the loading condition. At from no load to
light/medium load condition, the FB input drops
below burst mode threshold level. Device enters
Burst Mode control. The Gate drive output switches
only when VDD voltage drops below a preset level
and FB input is active to output an on state.
Otherwise the gate drive remains at off state to
•
Gate Drive
OB2263 Gate is connected to an external MOSFET
gate for power switch control. Too weak the gate
drive strength results in higher conduction and
switch loss of MOSFET while too strong gate drive
output compromises the EMI.
A good tradeoff is achieved through the built-in
totem pole gate design with right output strength
and dead time control. The low idle loss and good
EMI system design is easier to achieve with this
dedicated control scheme. An internal 18V clamp is
added for MOSFET gate protection at higher than
expected VDD input.
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