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ILI9325 参数 Datasheet PDF下载

ILI9325图片预览
型号: ILI9325
PDF下载: 下载PDF文件 查看货源
内容描述: 的a-Si TFT LCD单芯片驱动器240RGBx320分辨率和26万色 [a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K color]
分类和应用: 驱动器
文件页数/大小: 111 页 / 1190 K
品牌: ETC [ ETC ]
 浏览型号ILI9325的Datasheet PDF文件第73页浏览型号ILI9325的Datasheet PDF文件第74页浏览型号ILI9325的Datasheet PDF文件第75页浏览型号ILI9325的Datasheet PDF文件第76页浏览型号ILI9325的Datasheet PDF文件第78页浏览型号ILI9325的Datasheet PDF文件第79页浏览型号ILI9325的Datasheet PDF文件第80页浏览型号ILI9325的Datasheet PDF文件第81页  
a-Si TFT LCD Single Chip Driver  
240RGBx320 Resolution and 262K color  
ILI9325  
8.2.30. Panel Interface Control 1 (R90h)  
R/W RS  
D15 D14 D13 D12 D11 D10  
D9  
D8  
D7 D6 D5  
D4  
D3  
D2  
D1  
D0  
W
1
0
0
0
0
0
0
DIVI1 DIVI0  
0
0
0
RTNI4 RTNI3 RTNI2 RTNI1 RTNI0  
RTNI[4:0]: Sets 1H (line) clock number of internal clock operating mode. In this mode, ILI9325 display  
operation is synchronized with internal clock signal.  
RTNI[4:0]  
00000~01111 Setting Disabled  
Clocks/Line  
RTNI[4:0]  
11000  
11001  
11010  
11011  
11100  
11101  
11110  
11111  
Clocks/Line  
24 clocks  
25 clocks  
26 clocks  
27 clocks  
28 clocks  
29 clocks  
30 clocks  
31 clocks  
10000  
10001  
10010  
10011  
10100  
10101  
10110  
10111  
16 clocks  
17 clocks  
18 clocks  
19 clocks  
20 clocks  
21 clocks  
22 clocks  
23 clocks  
DIVI[1:0]: Sets the division ratio of internal clock frequency.  
DIVI1 DIVI0 Division Ratio Internal Operation Clock Frequency  
0
0
1
1
0
1
0
1
1
2
4
8
fosc / 1  
fosc / 2  
fosc / 4  
fosc / 8  
8.2.31. Panel Interface Control 2 (R92h)  
R/W RS  
D15 D14 D13 D12 D11  
D10  
D9  
D8  
D7  
D6 D5 D4  
D3  
D2  
D1  
D0  
W
1
0
0
0
0
0
NOWI[2] NOWI[1] NOWI[0]  
0
0
0
0
0
0
0
0
NOWI[2:0]: Sets the gate output non-overlap period when ILI9325 display operation is synchronized with  
internal clock signal.  
NOWI[2:0]  
000  
Gate Non-overlap Period  
0 clocks  
001  
1 clocks  
010  
2 clocks  
011  
3 clocks  
100  
4 clocks  
101  
5 clocks  
110  
6 clocks  
111  
7 clocks  
Note: The gate output non-overlap period is defined by the number of frequency-divided internal clocks, the  
frequency of which is determined by instruction (DIVI), from the reference point.  
8.2.32. Panel Interface Control 4 (R95h)  
R/W RS  
D15 D14 D13 D12 D11 D10  
D9  
D8  
D7 D6  
D5  
D4  
D3  
D2  
D1  
D0  
W
1
0
0
0
0
0
0
DIVE1 DIVE0  
0
0
RTNE5 RTNE4 RTNE3 RTNE2 RTNE1 RTNE0  
RTNE[5:0]: Sets 1H (line) clock number of RGB interface mode. In this mode, ILI9325 display operation is  
synchronized with RGB interface signals.  
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,  
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.  
Page 77 of 111  
Version: 0.35  
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