a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9325
Figures
FIGURE1 SYSTEM INTERFACE AND RGB INTERFACE CONNECTION....................................................................................25
FIGURE2 18-BIT SYSTEM INTERFACE DATA FORMAT .........................................................................................................26
FIGURE3 16-BIT SYSTEM INTERFACE DATA FORMAT .........................................................................................................27
FIGURE4 9-BIT SYSTEM INTERFACE DATA FORMAT ...........................................................................................................28
FIGURE5 8-BIT SYSTEM INTERFACE DATA FORMAT ...........................................................................................................29
FIGURE6 DATA TRANSFER SYNCHRONIZATION IN 8/9-BIT SYSTEM INTERFACE..................................................................29
FIGURE 7 DATA FORMAT OF SPI INTERFACE.....................................................................................................................31
FIGURE8 DATA TRANSMISSION THROUGH SERIAL PERIPHERAL INTERFACE (SPI) ...............................................................32
FIGURE9 DATA TRANSMISSION THROUGH SERIAL PERIPHERAL INTERFACE (SPI), TRI=”1” AND DFM=”10”)....................33
FIGURE10 DATA TRANSMISSION THROUGH VSYNC INTERFACE).......................................................................................34
FIGURE11 MOVING PICTURE DATA TRANSMISSION THROUGH VSYNC INTERFACE ............................................................34
FIGURE12 OPERATION THROUGH VSYNC INTERFACE ......................................................................................................35
FIGURE13 TRANSITION FLOW BETWEEN VSYNC AND INTERNAL CLOCK OPERATION MODES ............................................37
FIGURE14 RGB INTERFACE DATA FORMAT ......................................................................................................................38
FIGURE15 GRAM ACCESS AREA BY RGB INTERFACE .....................................................................................................39
FIGURE16 TIMING CHART OF SIGNALS IN 18-/16-BIT RGB INTERFACE MODE..................................................................40
FIGURE17 TIMING CHART OF SIGNALS IN 6-BIT RGB INTERFACE MODE ............................................................................41
FIGURE18 EXAMPLE OF UPDATE THE STILL AND MOVING PICTURE....................................................................................42
FIGURE19 INTERNAL CLOCK OPERATION/RGB INTERFACE MODE SWITCHING ...................................................................45
FIGURE20 GRAM ACCESS BETWEEN SYSTEM INTERFACE AND RGB INTERFACE ..............................................................46
FIGURE21 RELATIONSHIP BETWEEN RGB I/F SIGNALS AND LCD DRIVING SIGNALS FOR PANEL .....................................47
FIGURE22 REGISTER SETTING WITH SERIAL PERIPHERAL INTERFACE (SPI)......................................................................48
FIGURE23 REGISTER SETTING WITH I80 SYSTEM INTERFACE ............................................................................................49
FIGURE 24 REGISTER READ/WRITE TIMING OF I80 SYSTEM INTERFACE ...........................................................................50
FIGURE25 GRAM ACCESS DIRECTION SETTING ...............................................................................................................56
FIGURE26 GRAM HIGH-SPEED WRITE MODE...................................................................................................................57
FIGURE27 HIGH-SPEED CONSECUTIVE WRITE OPERATION (IN 18/16-BIT INTERFACE MODE)..............................................57
FIGURE28 16-BIT MPU SYSTEM INTERFACE DATA FORMAT.............................................................................................58
FIGURE29 8-BIT MPU SYSTEM INTERFACE DATA FORMAT...............................................................................................58
FIGURE 30 DATA READ FROM GRAM THROUGH READ DATA REGISTER IN 18-/16-/9-/8-BIT INTERFACE MODE..............69
FIGURE 31 GRAM DATA READ BACK FLOW CHART ........................................................................................................70
FIGURE 32 GRAM ACCESS RANGE CONFIGURATION ........................................................................................................73
FIGURE33 GRAM READ/WRITE TIMING OF I80-SYSTEM INTERFACE ...............................................................................83
FIGURE34 I80-SYSTEM INTERFACE WITH 18-/16-/9-BIT DATA BUS (SS=”0”, BGR=”0”) .................................................85
FIGURE35 I80-SYSTEM INTERFACE WITH 8-BIT DATA BUS (SS=”0”, BGR=”0”) ..............................................................86
FIGURE 36 I80-SYSTEM INTERFACE WITH 18-/9-BIT DATA BUS (SS=”1”, BGR=”1”).......................................................88
FIGURE 37 GRAM ACCESS WINDOW MAP .......................................................................................................................89
FIGURE 38 GRAYSCALE VOLTAGE GENERATION...............................................................................................................91
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