Data Sheet
June 1999
ORCA Series 2 FPGAs
Pin Information (continued)
Table 27. OR2C/2T10A, OR2C/2T12A, OR2C/2T15A/B, OR2C/2T26A, and OR2T40A/B 352-Pin PBGA
Pinout (continued)
Pin
2C/2T10A Pad 2C/2T12A Pad 2C/2T15A/B Pad 2C/2T26A Pad OR2T40A/B Pad
Function
A12
B11
C12
A11
D12
B10
C11
A10
D10
B9
PT7B
PT7A
PT6D
PT6C
PT6B
PT6A
PT5D
PT5C
PT5B
PT5A
PT4D
PT4C
PT4B
PT4A
—
PT8B
PT8A
PT7D
PT7C
PT7B
PT7A
PT6D
PT6C
PT6B
PT6A
PT5D
PT5C
PT5B
PT5A
PT4D
PT4C
PT4B
PT4A
PT3D
PT3C
PT3B
PT3A
PT2D
PT2C
PT2B
—
PT9B
PT9A
PT8D
PT8C
PT8B
PT8A
PT7D
PT7C
PT7B
PT7A
PT6D
PT6C
PT6B
PT6A
PT5D
PT5C
PT5B
PT5A
PT4D
PT4C
PT4B
PT4A
PT3D
PT3A
PT2D
PT2C
PT2B
PT2A
PT1D
PT1C
PT1B
PT1A
PT10D
PT10A
PT9D
PT9A
PT8D
PT8A/
PT7D
PT7C
PT7B
PT7A
PT6D
PT6C
PT6B
PT6A
PT5D
PT5C
PT5B
PT5A
PT4D
PT4C
PT4B
PT4A
PT3D
PT3A
PT2D
PT2C
PT2B
PT2A
PT1D
PT1C
PT1B
PT1A
PT13D
PT13A
PT12D
PT12A
PT11D
PT11A
PT10D
PT10A
PT9D
PT9A
PT8D
PT8A
PT7D
PT7A
PT6D
PT6C
PT6B
VDD5
I/O
I/O-D0/DIN
I/O
I/O
I/O
I/O-DOUT
I/O
I/O
I/O
I/O
C10
A9
I/O
I/O
B8
I/O
A8
I/O-TDI
I/O
C9
B7
PT3D
—
I/O
D8
I/O
A7
PT3C
—
I/O-VDD5
I/O
C8
PT5D
PT5C
PT5B
PT5A
PT4D
PT4A
PT3D
PT3C
PT3B
PT3A
PT2D
PT2A
PT1D
PT1A
B6
PT3B
—
I/O
D7
I/O
A6
PT3A
PT2D
PT2C
PT2B
—
I/O-TMS
I/O
C7
B5
I/O
A5
I/O
C6
I/O
B4
—
—
I/O
D5
PT2A
PT1D
PT1C
PT1B
PT1A
PT2A
PT1D
PT1C
PT1B
PT1A
I/O
A4
I/O
C5
I/O
B3
I/O
C4
I/O-TCK
A3
RD_DATA/TDO RD_DATA/TDO RD_DATA/TDO RD_DATA/TDO RD_DATA/TDO
RD_DATA/
TDO
A1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A2
A26
AC13
AC18
AC23
Notes:
The pins labeled I/O-VDD5 are user I/Os for the OR2CxxA and OR2TxxB series, but they are connected to VDD5 for the OR2TxxA series.
The pins labeled VSS-ETC are the 6 x 6 array of thermal balls located at the center of the package. The balls can be attached to the ground plane
of the board for enhanced thermal capability (see Table 29), or they can be left unconnected.
Lucent Technologies Inc.
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