Data Sheet
June 1999
ORCA Series 2 FPGAs
In the third submode, multiplier submode, a single
PFU can affect a 4 x 1-bit multiply and sum with a par-
tial product (see Figure 11). The multiplier bit is input at
A4, and the multiplicand bits are input at B[3:0], where
B3 is the most significant bit (MSB). A[3:0] contains the
partial product (or other input to be summed) from a
previous stage. If A4 is logical 1, the multiplicand is
added to the partial product. If A4 is logical zero, zero is
added to the partial product, which is the same as
passing the partial product. CIN can hold the carry-in
from the less significant PFUs if the multiplicand is
wider than 4 bits, and COUT holds any carry-out from
the addition, which may then be used as part of the
product or routed to another PFU in multiplier mode for
multiplicand width expansion.
Programmable Logic Cells (continued)
The second submode is the counter submode (see
Figure 10). The present count is supplied to input
A[3:0], and then output F[3:0] will either be incre-
mented by one for an up counter or decremented by
one for a down counter. If an up counter or down
counter is needed, the control signal to select the direc-
tion (up or down) is input on A4. Generally, the latches/
FFs in the same PFU are used to hold the present
count value.
LUT
COUT
COUT
QLUT3
A3
A2
A1
F3
F2
F1
F0
Q3
Q2
Q1
Q0
D
D
D
D
Q
Q
Q
Q
A3 B3
A2 B2
A1 B1
A0 B0
0
0
0
0
0
0
0
0
QLUT2
1
1
1
1
A4
+
+
+
+
COUT
CIN
QLUT1
F3
F2
F1
F0
5-4620(F)
Figure 11. Multiplier Submode
A0
QLUT0
CIN
Ripple mode’s fourth submode features equality
comparators, where one 4-bit bus is input on B[3:0],
another 4-bit bus is input on B[3:0], and the carry-in is
tied to 0 inside the PFU. The carry-out (¦) signal will be
0 if A = B or will be 1 if A ¦ B. If larger than 4 bits, the
carry-out (¦) signal can be cascaded using fast-carry
logic to the carry-in of any adjacent PFU. Comparators
for greater than or equal or less than (>, =, <) continue
to be supported using the ripple mode subtractor. The
use of this submode could be shown using Figure 9
with CIN tied to 0.
CIN
5-4643(F).r1
Figure 10. Counter Submode with Flip-Flops
Lucent Technologies Inc.
11
ETC [ ETC ]
