CY545 Stepper System Controller
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the immediate command, the CY545B resumes external memory execution, unless the
immediate command was the "0" command, which stops the execution.
Note that the first handshake, without driving the data bus, is only required by the parallel
interface during immediate commands, issued while the CY545B is also running a program from
the local external memory.
When the CY545B is only executing immediate commands from the host, or when the host uses
the serial interface instead of parallel interface, the "0FFh" first character is not required.
However, if you issue a first handshake with no command character (read as 0FFh by the
CY545B) in these cases, the CY545B will still ignore that character.
The examples below show the initial handshake of an immediate command during external
memory execution. Notice that in the general case, FPL might go low before Busy goes low. In
this case, the CY545B has decided (due to a command from the memory) to output a message
to the host rather than accept the immediate command input. This is shown in the first example
waveform below. The CY545B is driving the data bus when FPL is low.
The host must accept the output message from the CY545B before continuing with the
immediate command in this case. The state of FPL during the first handshake will determine if
the CY545B is taking the command from the host (FPL high), or if the CY545B is outputting a
message to the host (FPL low).
After the CY545B has issued the output message, and FPL is high again, the host may continue
with the immediate command handshake, and the CY545B will now accept and execute the
immediate command as shown in the second example waveform below. Here, the host does not
drive the data bus for the first handshake, and thereby gives the CY545B the "0FFh" first
command character prefix. This is followed by the normal first command character.
Also note that the second example waveform applies to the case where the CY545B accepts
the immediate command without first generating some output data.
© 2002 Cybernetic Micro Systems
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Chapter 16 - Timing and Control
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